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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
DCE
Digital linear tape
BEDO DRAM
Bandwidth
2. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Branch
Base
Demultiplexer
Ampere- hour(Ah) rating
3. The process of converting an analog signal to digital form
Bus
ABEL(Advance Boolean Expression Language)
Cross - assembler
Analog- to- digital (A/D) conversion
4. The process or sequence of operations carried out to program a target device
Balanced Load
Clock
Design flow
Data bus
5. A transformer in which the primary and secondary are in a single winding
Atom
Autotransformer
Addend
Astable
6. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
Alphanumeric
Component
AND array
7. A type of magnetic tape format
BJT
Digital linear tape
AWG
Attenuation
8. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Charge- coupled device
CMOS
Acceptor
9. A group of eight bits
Byte
Norton's Theorem
Balanced Load
Base
10. The ratio of pulse width to period expressed as a percentage
CMOS Complementary Metal Oxide Semiconductor
Analog- to- digital (A/D) conversion
Duty cycle
Bitstream
11. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Balanced Bridge
Vx=(Vs * Rx) /RT
Concurrency
Ammeter
12. American National Standards Institute
Carry propagation
ANSI
Decade Counter
Data Sheet
13. The ability of a capacitor to store electrical charge.
Bandwidth
Capacitance
Bidirectional shift Register
Assembly language
14. The beginning address of a segment of memory
Base address
Address Bus
Bleeder Current
Band- stop filter
15. A program that converts English- like mnemonics into machine code
Binary coded decimal
Collector
CMOS
Assembler
16. Digital audio tape; a type of magnetic tape format
DRAM
DAT
Design flow
Binary
17. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Norton's Theorem
ABEL(Advance Boolean Expression Language)
DIMM
Decade Counter
18. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Capacity
Control Unit
Address Bus
Aliasing
19. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Center Tap
Amplitude
CLB (Configurable Logic Block)
Address
20. A semiconductor device that conducts current in only one direction
Boundary scan
Antifuse
Diode
AWG
21. A binary digit - which can be either 1 or 0
Bit
Byte
Bidirectional shift Register
DRAM
22. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Don't Care...
Duty cycle
Demultiplexer
bed- of- nails
23. Having two stable states. Flip- flops and latches are bistable multivibrators.
Apparent power
Capacitor
CMOS Complementary Metal Oxide Semiconductor
Bistable
24. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Current sinking
Capacitance Reactance
BIOS
ALU
25. The action of a circuit in which it accepts current into its output from a load
Assembler
Bus interface unit
Current sinking
D Flip-Flop
26. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Capacity
Average value
DSP
Decade
27. A series of bits describing a final design that is sent to the target device during programming
Center Tap
Bitstream
Boolean algebra
Debug
28. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Capacitor
Bandwidth
Data Sheet
Ammeter
29. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Circular Mil (CM)
Control Unit
Design flow
Admittance
30. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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31. The smallest particle of an element possessing the unique characteristics of that element.
Asynchronous counter
Angular Velocity
Atom
DSP
32. An array of AND gates consisting of a matrix of programmable interconnection
Choke
Bipolar
Boolean algebra
AND array
33. In Boolean algebra - the AND operation
Collector
Base address
Boolean multiplication
Architecture
34. Having two opposites charge carriers within the transistor structure
Bleeder Current
Bode Plot
Bipolar
Binary coded decimal
35. Consisting of numerals - letters - and other characters
Boolean expression
Capacity
Alphanumeric
Capacitance Reactance
36. The digit generated when the sum of two binary digits exceeds 1
Access time
Carry
Boundary scan
Amplitude
37. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Bode Plot
CMOS
Apparent power
Array
38. A condition where all the load currents are equal and the neutral current is zero
BIOS
Balanced Load
ABEL(Advance Boolean Expression Language)
Analog- to- digital converter(ADC)
39. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Boolean algebra
Controller
Bit time
Dividend
40. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Associative law
Amplitude
Balanced Bridge
Decoder
41. A connection at the midpoint of a winding in a transformer
Center Tap
Bandwidth
Closed circuit
Branch
42. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Cross - assembler
Cascade
TTL
Battery
43. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
ALU
Bistable
Analog- to- digital converter(ADC)
Circuit
44. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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45. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Center Tap
Astable
Counter
Concurrency
46. Dual in - line memory module
DIMM
Address Bus
Capacity
Binary coded decimal
47. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Atom
DMA
Cache memory
Amplitude
48. A resettable protective device used for interrupting execessive current in an electric circuit
Bleeder Current
Circuit Breaker
Demultiplexer
AHDL
49. A logic circuit used to add two binary numbers
Debug
Adder
Cache memory
Bus arbitration
50. In addition - the number that is added to another number called the augend
Clock
Adder
Boolean addition
Addend