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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. In addition - the number to which the addend is added
Circuit
Kirchoff's Voltage Law
Thevenin Equivalent Circuit
Augend
2. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Concurrency
BIOS
AND
Compiler
3. The number of protons in a nucleus
Atomic number
Analog- to- digital converter(ADC)
Duty cycle
Debug
4. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Branch Current
CMOS
Dynamic Memory
Data Selector
5. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Assembly language
Dependency notation
Adjacency
Distributive Law
6. Information in numeric - alphabetic - or other form.
Access time
Commutative Law
Data
Data Selector
7. An array of AND gates consisting of a matrix of programmable interconnection
Decrement
Augend
Boolean algebra
AND array
8. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
BJT
Admittance
Counter
Autotransformer
9. The current left after the total load current is subtracted from the total current into the circuit
Don't Care...
Code
Bleeder Current
DIMM
10. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bus contention
Analog- to- digital (A/D) conversion
Control Bus
Data Selector
11. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Admittance
CMOS
Array
Band- pass filter
12. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Delta Modulation
Angular Velocity
Byte
Decade Counter
13. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Apparent power
AND gate
ABEL(Advance Boolean Expression Language)
Band- stop filter
14. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Digital linear tape
Bus arbitration
D Flip-Flop
Data
15. Having two stable states. Flip- flops and latches are bistable multivibrators.
Digital linear tape
Bistable
Data bus
Branch
16. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Kirchoff's Current Law(KCL)
Analog- to- digital (A/D) conversion
Decade Counter
Architecture
17. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Data Sheet
Average value
Combinational logic
Bidirectional shift Register
18. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
DIMM
Capacity
Debug
Bistable
19. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Collector
Component
DAT
ASCII
20. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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21. The maximum value of a voltage or current
Choke
Adjacency
Amplitude
Addend
22. The beginning address of a segment of memory
Cascade
Base address
Alphanumeric
Analog- to- digital (A/D) conversion
23. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Kirchoff's Current Law(KCL)
Control Bus
CMOS Complementary Metal Oxide Semiconductor
Astable
24. Sum of all the voltage drops in series equals to the source voltage
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25. In a division operation the quantity that is being divided
Atom
Dividend
Debug
Bit
26. The mathematics of logic circuits
Code
Branch
Data Selector
Boolean algebra
27. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Complement
Commutative Law
Band- stop filter
Boolean multiplication
28. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Admittance
Adjacency
AWG
29. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Decoder
Bit
DRAM
Architecture
30. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Dynamic Memory
Comparator
Decoder
Architecture
31. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
Carry generation
Clock
Assembler
32. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
CLB (Configurable Logic Block)
Cascade
TTL
Antifuse
33. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
BEDO DRAM
Asynchronous counter
Aliasing
Band- stop filter
34. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Ampere- hour(Ah) rating
Bit
Bitstream
Bistable
35. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Address
Boundary scan
Dividend
Aliasing
36. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
DMA
Admittance
AND
Band- pass filter
37. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Duty cycle
BEDO DRAM
Vx=(Vs * Rx) /RT
DIMM
38. A series of bits describing a final design that is sent to the target device during programming
Controller
Charge
Bitstream
DIMM
39. A type of counter in which each stage is clocked from the output of the preceding stage.
Controller
Asynchronous counter
Average value
Data bus
40. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Bode Plot
Commutative Law
Branch
Band- stop filter
41. A type of inductor used to block or choke off high frequencies
Apparent power
Choke
Astable
Data
42. Having two opposites charge carriers within the transistor structure
Branch
Base address
Ammeter
Bipolar
43. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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44. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Battery
Bit
Base address
Bit time
45. The process or sequence of operations carried out to program a target device
Bleeder Current
Battery
Design flow
DSP
46. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Address Bus
Distributive Law
CMOS
Address
47. An expression of variables and operators used to express the operation of a logic circuit
AND
Boolean expression
Dividend
TTL
48. American National Standards Institute
Carry generation
Carry
ANSI
Carry propagation
49. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Balanced Load
Band- stop filter
Analog- to- digital converter(ADC)
Carry
50. The time from the application of a valid memory address to the appearance of valid output data
Access time
Astable
Clear
Autotransformer