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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Debug
Carry propagation
Dividend
AND array
2. The process of converting an analog signal to digital form
Kirchoff's Current Law(KCL)
Base address
Current sinking
Analog- to- digital (A/D) conversion
3. In addition - the number to which the addend is added
CMOS
Augend
Clock
Capacitance Reactance
4. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Boolean expression
Clock
Bleeder Current
CMOS
5. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Combinational logic
Aliasing
Antifuse
CPLD
6. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Assembly language
Associative law
DSP
Bitstream
7. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
DIMM
Bus
Carry
8. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Dividend
Debug
Closed circuit
Collector
9. A combined coder and decoder
DRAM
Controller
Current sinking
Code
10. An electrical instrument used to measure current
Ammeter
Analog- to- digital (A/D) conversion
Central processing unit
Array
11. Consisting of numerals - letters - and other characters
Boolean addition
Alphanumeric
Clock
BIOS
12. A series of bits describing a final design that is sent to the target device during programming
Atomic number
Capacitance
Bitstream
Circuit
13. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Control Unit
Component
Attenuation
Choke
14. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
D Flip-Flop
Counter
Balanced Load
Band- pass filter
15. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Bleeder Current
Demultiplexer
Combinational logic
Boolean multiplication
16. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Ampere- hour(Ah) rating
Data
Capacitance Reactance
Address Bus
17. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Balanced Load
Base
Bandwidth
AND array
18. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Addend
Concurrency
Decoder
Data Sheet
19. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Dividend
Kirchoff's Voltage Law
Bit
Comparator
20. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Bode Plot
Capacitor
BEDO DRAM
Kirchoff's Voltage Law
21. American wire gauge; a standardization based on wire diameter
AWG
TTL
bed- of- nails
Capacitor
22. A program that converts English- like mnemonics into machine code
Controller
Code
Amplitude
Assembler
23. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Data Selector
Asynchronous counter
Array
Concurrency
24. Sum of all the voltage drops in series equals to the source voltage
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25. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Boolean multiplication
Complement
Assembly language
Bus contention
26. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Binary
Bipolar
AWG
Data bus
27. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
Charge- coupled device
BJT
Central processing unit
28. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
ANSI
Astable
D Flip-Flop
Bit
29. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Bus
Cache memory
Clock
Data bus
30. Altera HDL; a nonstandard HDL
bed- of- nails
AHDL
Capacity
Band- stop filter
31. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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32. A digital circuit device that converts coded information into another (familiar) or noncoded form
Array
Atom
Decoder
Balanced Load
33. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Adjacency
Vx=(Vs * Rx) /RT
Decoder
DSP
34. The number of protons in a nucleus
Angular Velocity
Control Unit
Ammeter
Atomic number
35. A type of IC package whose leads must pass through holes to the other side of a PC board
Bandwidth
Byte
Dual in - line package
Alphanumeric
36. A unit of the cross - sectional area of a wire.
Branch Current
Control Bus
Capacitance Reactance
Circular Mil (CM)
37. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Control Unit
Attenuation
DCE
Data bus
38. A connection at the midpoint of a winding in a transformer
Center Tap
Commutative Law
Clock
Adjacency
39. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Byte
Commutative Law
ALU
Circular Mil (CM)
40. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Digital linear tape
D Flip-Flop
Analog- to- digital (A/D) conversion
Apparent power
41. The ratio of pulse width to period expressed as a percentage
Decrement
Carry
Antifuse
Duty cycle
42. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
AND
Dynamic Memory
Controller
Distributive Law
43. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Distributive Law
Balanced Load
Charge- coupled device
Amplitude
44. The digit generated when the sum of two binary digits exceeds 1
ABEL(Advance Boolean Expression Language)
Baseline
Carry
DMA
45. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
ALU
Analog- to- digital converter(ADC)
Decrement
Adder
46. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Ampere- hour(Ah) rating
Aliasing
Circuit
Band- stop filter
47. Dual in - line memory module
Dynamic Memory
Boolean addition
Combinational logic
DIMM
48. American Standard Code for Information Interchange; the most widely used alphanumeric code.
ASCII
Bleeder Current
Analog- to- digital converter(ADC)
CMOS
49. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
DMA
Bit time
Delta Modulation
Concurrency
50. A device used to convert an analog signal to a sequence of digital codes
AND array
Vx=(Vs * Rx) /RT
Decrement
Analog- to- digital converter(ADC)