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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Component
Data
Distributive Law
Admittance
2. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Charge
Boolean expression
Attenuation
3. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Capacitor
Dual in - line package
Duty cycle
Adjacency
4. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
bed- of- nails
BJT
Acceptor
5. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
CLB (Configurable Logic Block)
Baseline
Band- pass filter
Capacity
6. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Antifuse
Data Sheet
AND gate
Bus contention
7. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Capacitance
ANSI
Circuit
Cascade
8. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Array
Analog- to- digital (A/D) conversion
Band- stop filter
Center Tap
9. American National Standards Institute
ANSI
Acceptor
Analog
Adjacency
10. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Astable
Adjacency
Compiler
bed- of- nails
11. A receiving device on a bus
Boolean algebra
Acceptor
bed- of- nails
Analog- to- digital converter(ADC)
12. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Ampere
Boolean expression
Data Sheet
Carry propagation
13. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Bitstream
CLB (Configurable Logic Block)
Bode Plot
bed- of- nails
14. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Center Tap
Counter
Bode Plot
Combinational logic
15. A group of eight bits
ABEL(Advance Boolean Expression Language)
AND gate
Byte
Amplitude
16. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
ANSI
Ampere
Circuit
Demultiplexer
17. Sum of all the voltage drops in series equals to the source voltage
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18. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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19. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Battery
Antifuse
Circuit
Clear
20. A type of inductor used to block or choke off high frequencies
Choke
Buffer
Circular Mil (CM)
Bias
21. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
DMA
DSP
Demultiplexer
Concurrency
22. A circuit with a complete current path
Decrement
Carry generation
Closed circuit
Clear
23. A set of interconnections that interface one or more devices based on a standardized specification
DTE
Component
Capacity
Bus
24. A logic circuit used to add two binary numbers
Current sinking
Adder
CPLD
Base
25. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Capacitor
AWG
Capacitance
DTE
26. A program that converts English- like mnemonics into machine code
Assembler
Capacity
bed- of- nails
ALU
27. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Bleeder Current
Bus contention
Angular Velocity
Associative law
28. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Design flow
Center Tap
Capacitance Reactance
Associative law
29. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Data bus
Balanced Bridge
Delta Modulation
CMOS
30. A resettable protective device used for interrupting execessive current in an electric circuit
Circuit Breaker
Design flow
Battery
Closed circuit
31. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Analog- to- digital converter(ADC)
Amplitude
Bandwidth
Attenuation
32. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Commutative Law
Controller
DRAM
Code
33. Consisting of numerals - letters - and other characters
Alphanumeric
Acceptor
Distributive Law
Associative law
34. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Angular Velocity
Byte
Branch Current
Boundary scan
35. Burst extended data output dynamic random- access memory
AHDL
BEDO DRAM
Current sinking
CLB (Configurable Logic Block)
36. A type of IC package whose leads must pass through holes to the other side of a PC board
Architecture
Dual in - line package
Assembly language
Adjacency
37. The actual current in a branch
ABEL(Advance Boolean Expression Language)
Analog- to- digital converter(ADC)
Branch Current
Distributive Law
38. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Controller
Cascade
Decoder
Control Unit
39. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
DMA
Comparator
Bus interface unit
Data Selector
40. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Cache memory
BEDO DRAM
Architecture
Admittance
41. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Norton's Theorem
Collector
Debug
ABEL(Advance Boolean Expression Language)
42. A connection at the midpoint of a winding in a transformer
Amplitude
Center Tap
Decade
Bus arbitration
43. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Bus arbitration
Boolean addition
BIOS
Capacitor
44. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Thevenin Equivalent Circuit
Distributive Law
Binary
Bit
45. Data Terminal equipment
Base
DTE
Decode
Clear
46. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Antifuse
Central processing unit
DTE
Control Bus
47. A digital circuit device that converts coded information into another (familiar) or noncoded form
Analog- to- digital (A/D) conversion
Decoder
Code
Combinational logic
48. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Balanced Bridge
Decode
Norton's Theorem
Central processing unit
49. The process of converting an analog signal to digital form
Asynchronous counter
Analog- to- digital (A/D) conversion
Debug
ASCII
50. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
D Flip-Flop
Kirchoff's Voltage Law
AWG
Clear