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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A type of magnetic tape format
Digital linear tape
Apparent power
AND
D Flip-Flop
2. A resettable protective device used for interrupting execessive current in an electric circuit
Circuit Breaker
Collector
Adjacency
Dual in - line package
3. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Diode
Baseline
Attenuation
Amplitude
4. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Adjacency
Capacitor
Counter
Adder
5. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Digital linear tape
Charge
Norton's Theorem
Choke
6. The process of producing an output carry in full- adder when both input bits are 1s.
Adjacency
Carry generation
Addend
Thevenin Equivalent Circuit
7. The process of converting an analog signal to digital form
Duty cycle
Antifuse
Analog- to- digital (A/D) conversion
Current sinking
8. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Capacity
Base address
Controller
Average value
9. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Vx=(Vs * Rx) /RT
Address
Attenuation
10. A software compiler language for SPLD programming; a type of hardware description language (HDL)
CMOS Complementary Metal Oxide Semiconductor
ABEL(Advance Boolean Expression Language)
DRAM
Buffer
11. The action of a circuit in which it accepts current into its output from a load
Decoder
Asynchronous counter
Atom
Current sinking
12. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Array
Cross - assembler
Attenuation
Aliasing
13. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Bode Plot
Associative law
ALU
CPLD
14. The current left after the total load current is subtracted from the total current into the circuit
Bias
Augend
Baseline
Bleeder Current
15. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Ampere- hour(Ah) rating
Antifuse
Band- stop filter
Assembly language
16. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Address Bus
Center Tap
Data bus
Access time
17. In addition - the number that is added to another number called the augend
Addend
Average value
Concurrency
Atomic number
18. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Combinational logic
Demultiplexer
Digital linear tape
Bus interface unit
19. A group of eight bits
Dependency notation
Byte
Addend
Attenuation
20. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
ALU
Decoder
Commutative Law
Carry
21. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Angular Velocity
CPLD
Associative law
22. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Bleeder Current
Astable
Band- stop filter
Compiler
23. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Addend
Data
Delta Modulation
Bus interface unit
24. One of the three regions in a bipolar junction transistor
Charge- coupled device
Ammeter
Delta Modulation
Base
25. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Analog
Buffer
Adjacency
Dual in - line package
26. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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27. Characterized by ten states or values
Dual in - line package
ASCII
Decade
Bitstream
28. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Bit time
Vx=(Vs * Rx) /RT
Analog- to- digital converter(ADC)
Architecture
29. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Carry
Dynamic Memory
Capacitance Reactance
Bus arbitration
30. Consisting of numerals - letters - and other characters
Bode Plot
Clock
Bidirectional shift Register
Alphanumeric
31. One current path in a parallel circuit; a current path that connects two nodes
Branch
DCE
Base address
Band- stop filter
32. Dual in - line memory module
DIMM
Dependency notation
Decode
Bus
33. An expression of variables and operators used to express the operation of a logic circuit
Adjacency
Atom
Circuit
Boolean expression
34. A transformer in which the primary and secondary are in a single winding
Autotransformer
BIOS
Don't Care...
Branch
35. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Decade
ANSI
Cross - assembler
Control Unit
36. Data Communications equipment
Assembler
Assembly language
ASCII
DCE
37. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Band- pass filter
Ammeter
Byte
ANSI
38. In addition - the number to which the addend is added
Kirchoff's Current Law(KCL)
Associative law
Cache memory
Augend
39. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Dynamic Memory
Analog
Atom
Atomic number
40. A type of inductor used to block or choke off high frequencies
Choke
AWG
Adder
Bus arbitration
41. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
AHDL
Average value
Capacitor
Associative law
42. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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43. Digital audio tape; a type of magnetic tape format
DAT
Carry
Asynchronous counter
Circuit
44. In Boolean algebra - the AND operation
Boolean multiplication
Decoder
Addend
Center Tap
45. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Amplitude
Binary coded decimal
Kirchoff's Current Law(KCL)
Dependency notation
46. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Admittance
Collector
ABEL(Advance Boolean Expression Language)
Circuit Breaker
47. Information in numeric - alphabetic - or other form.
Atom
Data
Clock
Carry
48. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Duty cycle
Vx=(Vs * Rx) /RT
Associative law
Boolean algebra
49. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Atomic number
Cross - assembler
BEDO DRAM
Band- stop filter
50. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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