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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Don't Care...
Decrement
Bus interface unit
Analog
2. A digital circuit device that converts coded information into another (familiar) or noncoded form
DSP
Decoder
Analog- to- digital (A/D) conversion
Bus interface unit
3. Dual in - line memory module
DIMM
Buffer
ANSI
Balanced Bridge
4. A method of analog- to- digital conversion using a 1- bit quantization process
Access time
Delta Modulation
Binary
Diode
5. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Array
Control Bus
Apparent power
ASCII
6. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Bus interface unit
Binary
Data
Address
7. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Apparent power
Closed circuit
TTL
Cascade
8. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Attenuation
Angular Velocity
Bit
Acceptor
9. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Aliasing
Control Unit
ANSI
Decimal
10. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Band- stop filter
Combinational logic
Alphanumeric
CPLD
11. A transformer in which the primary and secondary are in a single winding
Autotransformer
Capacity
Clock
Concurrency
12. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
DRAM
Clear
Balanced Load
Decade
13. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Capacitance Reactance
Data Selector
Bistable
DRAM
14. American wire gauge; a standardization based on wire diameter
AWG
DTE
ABEL(Advance Boolean Expression Language)
TTL
15. A programming language that uses English like words and has a one- to- one correspondence to machine language
Ampere
Assembly language
Boolean addition
Band- stop filter
16. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Buffer
Concurrency
Angular Velocity
Cascade
17. In a division operation the quantity that is being divided
Attenuation
Dividend
Decrement
Battery
18. The maximum value of a voltage or current
Array
Amplitude
DIMM
Data
19. Information in numeric - alphabetic - or other form.
Data
Design flow
Central processing unit
AHDL
20. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Decode
ASCII
Controller
AHDL
21. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
Digital linear tape
Bit
BJT
AWG
22. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Decode
Analog
Analog- to- digital (A/D) conversion
DTE
23. Having two opposites charge carriers within the transistor structure
Aliasing
Bipolar
Concurrency
Base
24. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
ABEL(Advance Boolean Expression Language)
Ampere- hour(Ah) rating
Bit time
Closed circuit
25. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Average value
BJT
Vx=(Vs * Rx) /RT
ASCII
26. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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183
27. Altera HDL; a nonstandard HDL
AHDL
BEDO DRAM
Capacitor
bed- of- nails
28. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Base address
Commutative Law
DTE
Controller
29. A series of bits describing a final design that is sent to the target device during programming
Binary coded decimal
DCE
Bitstream
Data bus
30. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Angular Velocity
Binary coded decimal
Band- pass filter
Bidirectional shift Register
31. A receiving device on a bus
Charge- coupled device
Boundary scan
Code
Acceptor
32. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Closed circuit
Distributive Law
ALU
Boolean expression
33. A set of interconnections that interface one or more devices based on a standardized specification
Attenuation
Dual in - line package
Bus
Bias
34. The unit of electrical current
Ampere
Data Sheet
Bistable
Boolean expression
35. A condition where all the load currents are equal and the neutral current is zero
Clock
Adder
D Flip-Flop
Balanced Load
36. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
Amplitude
Capacitor
Component
CPLD
37. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Boolean algebra
Antifuse
DCE
D Flip-Flop
38. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Decoder
Binary coded decimal
Norton's Theorem
Amplitude
39. Digital audio tape; a type of magnetic tape format
DAT
Delta Modulation
Vx=(Vs * Rx) /RT
Bipolar
40. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
DSP
Base address
Capacitance Reactance
Boolean multiplication
41. A class of integrated logic circuits that is implemented with a type of field effect transistor
CMOS
Boolean multiplication
CMOS Complementary Metal Oxide Semiconductor
Decrement
42. The ability of a capacitor to store electrical charge.
Capacitance
Amplitude
Debug
Acceptor
43. A type of counter in which each stage is clocked from the output of the preceding stage.
Capacitor
Compiler
Asynchronous counter
Debug
44. A logic gate that produces a High output only when all of the inputs are HIGH
Center Tap
AND gate
Decade
Current sinking
45. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Distributive Law
Kirchoff's Current Law(KCL)
Cascade
Average value
46. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Counter
ABEL(Advance Boolean Expression Language)
Angular Velocity
Branch Current
47. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
Data bus
Bleeder Current
Commutative Law
48. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Dependency notation
Bit time
Center Tap
Commutative Law
49. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
DSP
Control Bus
Asynchronous counter
Data bus
50. The process that prevents two sources from using a bus at the same time
Bode Plot
Acceptor
Bus arbitration
Demultiplexer
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