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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
AND gate
Battery
Cascade
Diode
2. To decrease the binary state of a counter by one
CMOS
Controller
Decrement
ANSI
3. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Ampere- hour(Ah) rating
Dynamic Memory
Data bus
Compiler
4. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Binary
Charge- coupled device
Duty cycle
Assembler
5. The digit generated when the sum of two binary digits exceeds 1
Admittance
D Flip-Flop
Band- stop filter
Carry
6. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Analog- to- digital (A/D) conversion
Digital linear tape
DIMM
BIOS
7. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Duty cycle
Address Bus
Counter
Architecture
8. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
BJT
Combinational logic
Array
Thevenin Equivalent Circuit
9. The process that prevents two sources from using a bus at the same time
Bus arbitration
Boundary scan
ALU
Address
10. The ratio of pulse width to period expressed as a percentage
Clear
DMA
Norton's Theorem
Duty cycle
11. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Boolean expression
Demultiplexer
Battery
DRAM
12. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Bleeder Current
Complement
Component
Digital linear tape
13. A method of analog- to- digital conversion using a 1- bit quantization process
Delta Modulation
Balanced Load
Demultiplexer
Commutative Law
14. Digital Signal Processor; a special type of microprocessor that processes data in real time
Comparator
ABEL(Advance Boolean Expression Language)
Concurrency
DSP
15. Dual in - line memory module
DIMM
Analog- to- digital (A/D) conversion
Byte
Baseline
16. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
BEDO DRAM
Alphanumeric
Code
Aliasing
17. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Branch Current
Central processing unit
BEDO DRAM
Admittance
18. Having two opposites charge carriers within the transistor structure
Bit time
Distributive Law
Bipolar
Antifuse
19. The process of converting an analog signal to digital form
AWG
Data Selector
Closed circuit
Analog- to- digital (A/D) conversion
20. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Bleeder Current
Charge- coupled device
Address Bus
Balanced Bridge
21. An array of AND gates consisting of a matrix of programmable interconnection
Circular Mil (CM)
Component
Capacitance Reactance
AND array
22. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Capacitance Reactance
Control Unit
Design flow
Base address
23. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
DSP
Concurrency
Decimal
Cascade
24. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
ANSI
Bode Plot
Analog
DRAM
25. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Demultiplexer
Antifuse
Analog- to- digital converter(ADC)
Address Bus
26. A circuit that prevents loading of an input or output
Vx=(Vs * Rx) /RT
Decode
Dual in - line package
Buffer
27. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Angular Velocity
ASCII
DRAM
Decrement
28. The mathematics of logic circuits
Clock
Boolean algebra
CMOS
Capacitance
29. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Assembler
Data Sheet
Collector
Decoder
30. A type of magnetic tape format
Bias
Digital linear tape
Binary coded decimal
Balanced Bridge
31. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Baseline
Bit time
Band- stop filter
Average value
32. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Debug
Attenuation
Atomic number
ASCII
33. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Distributive Law
Ampere- hour(Ah) rating
Data Selector
CMOS Complementary Metal Oxide Semiconductor
34. A device used to convert an analog signal to a sequence of digital codes
Circuit
Asynchronous counter
CLB (Configurable Logic Block)
Analog- to- digital converter(ADC)
35. In Boolean algebra - the OR operation
Boolean addition
Charge- coupled device
Balanced Bridge
Branch Current
36. An electrical instrument used to measure current
Dependency notation
CMOS
Ammeter
Debug
37. An expression of variables and operators used to express the operation of a logic circuit
Asynchronous counter
Distributive Law
Charge
Boolean expression
38. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Cross - assembler
Cascade
Clear
Antifuse
39. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Charge- coupled device
Vx=(Vs * Rx) /RT
Bidirectional shift Register
Duty cycle
40. Consisting of numerals - letters - and other characters
AWG
Alphanumeric
BEDO DRAM
Distributive Law
41. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
bed- of- nails
Data bus
Carry
DMA
42. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
AND array
Ampere
Comparator
Bus interface unit
43. A combined coder and decoder
Concurrency
Cascade
Ampere
Code
44. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Clear
Data Selector
bed- of- nails
Decrement
45. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Band- pass filter
Boundary scan
DTE
CLB (Configurable Logic Block)
46. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
BIOS
Kirchoff's Current Law(KCL)
Boolean algebra
47. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Boolean addition
Bus interface unit
Capacitance Reactance
Capacitor
48. Burst extended data output dynamic random- access memory
Thevenin Equivalent Circuit
BEDO DRAM
Base address
Closed circuit
49. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Delta Modulation
Data Selector
Average value
Charge
50. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
BIOS
Band- stop filter
Carry generation
Code