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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Carry generation
Bit
D Flip-Flop
Data Selector
2. Having two opposites charge carriers within the transistor structure
Capacitance Reactance
Array
Decode
Bipolar
3. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Collector
Capacitance Reactance
AND array
Commutative Law
4. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Aliasing
CMOS
Clear
ASCII
5. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Clock
Thevenin Equivalent Circuit
BEDO DRAM
AHDL
6. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Assembler
Capacitance Reactance
Charge- coupled device
Adder
7. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
DTE
Array
Band- pass filter
Cascade
8. Information in numeric - alphabetic - or other form.
Carry generation
Architecture
CMOS
Data
9. A type of magnetic tape format
Analog- to- digital (A/D) conversion
Digital linear tape
Addend
Complement
10. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Branch
Component
Bus interface unit
Buffer
11. The time from the application of a valid memory address to the appearance of valid output data
Collector
Comparator
Capacitor
Access time
12. The process or sequence of operations carried out to program a target device
Clock
Design flow
Ammeter
Analog- to- digital (A/D) conversion
13. A receiving device on a bus
Acceptor
Vx=(Vs * Rx) /RT
Duty cycle
Center Tap
14. A set of interconnections that interface one or more devices based on a standardized specification
Carry generation
Autotransformer
Bus
Byte
15. A group of eight bits
BJT
Byte
Bus contention
Central processing unit
16. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Address Bus
Capacity
Current sinking
CMOS Complementary Metal Oxide Semiconductor
17. The digit generated when the sum of two binary digits exceeds 1
Carry
Assembler
Bitstream
Circuit
18. A class of integrated logic circuits that is implemented with a type of field effect transistor
Branch
CMOS Complementary Metal Oxide Semiconductor
Central processing unit
Charge
19. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CLB (Configurable Logic Block)
Cross - assembler
Binary coded decimal
Access time
20. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Bus interface unit
Analog- to- digital (A/D) conversion
Bit time
AND
21. A circuit with a complete current path
Duty cycle
AND
Closed circuit
Circular Mil (CM)
22. The beginning address of a segment of memory
Base address
Charge- coupled device
Binary coded decimal
Digital linear tape
23. In addition - the number that is added to another number called the augend
Alphanumeric
Aliasing
ANSI
Addend
24. A digital circuit device that converts coded information into another (familiar) or noncoded form
Ampere
Design flow
DSP
Decoder
25. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Bus contention
Astable
Bus interface unit
Band- stop filter
26. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
DIMM
Bus interface unit
Array
Ampere- hour(Ah) rating
27. In Boolean algebra - the AND operation
Bus arbitration
Concurrency
Decoder
Boolean multiplication
28. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Apparent power
Assembler
AND
Boundary scan
29. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Admittance
Bus contention
Boolean multiplication
Diode
30. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Array
CMOS
Data Sheet
Dividend
31. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
BJT
Buffer
Byte
Bias
32. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Bit
AHDL
Data Sheet
Collector
33. The process of converting an analog signal to digital form
Architecture
Analog- to- digital (A/D) conversion
Atomic number
Central processing unit
34. A programming language that uses English like words and has a one- to- one correspondence to machine language
Band- stop filter
Assembly language
CMOS Complementary Metal Oxide Semiconductor
Array
35. Sum of all the voltage drops in series equals to the source voltage
Warning
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183
36. A program that converts English- like mnemonics into machine code
Dependency notation
Capacitor
Assembler
Vx=(Vs * Rx) /RT
37. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Charge- coupled device
D Flip-Flop
Decimal
Clock
38. The process of producing an output carry in full- adder when both input bits are 1s.
Digital linear tape
DRAM
Ampere
Carry generation
39. A resettable protective device used for interrupting execessive current in an electric circuit
Atomic number
Circuit Breaker
bed- of- nails
Bus interface unit
40. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Charge
Amplitude
AND array
Comparator
41. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Duty cycle
Architecture
Controller
Boolean expression
42. Burst extended data output dynamic random- access memory
BEDO DRAM
bed- of- nails
CMOS Complementary Metal Oxide Semiconductor
Carry propagation
43. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
AHDL
ALU
Bandwidth
Thevenin Equivalent Circuit
44. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Adjacency
Dual in - line package
Astable
DMA
45. A circuit that prevents loading of an input or output
Buffer
Binary
DAT
Branch Current
46. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Bipolar
Ammeter
Circuit
DMA
47. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Ampere
AWG
Atom
48. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Analog
Bipolar
Bus contention
Dependency notation
49. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Analog- to- digital (A/D) conversion
Angular Velocity
Bitstream
Dual in - line package
50. A device used to convert an analog signal to a sequence of digital codes
Analog- to- digital converter(ADC)
AND array
Bus contention
Kirchoff's Current Law(KCL)