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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A type of counter in which each stage is clocked from the output of the preceding stage.
Asynchronous counter
Binary
Architecture
Boundary scan
2. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Kirchoff's Voltage Law
Balanced Load
Bandwidth
Cross - assembler
3. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Address Bus
Addend
DMA
Dependency notation
4. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
AHDL
Binary
Assembler
Capacity
5. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Charge
Capacitance
Current sinking
BIOS
6. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Circuit
Bode Plot
Demultiplexer
Byte
7. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Bus interface unit
Dynamic Memory
CMOS Complementary Metal Oxide Semiconductor
Amplitude
8. American wire gauge; a standardization based on wire diameter
Debug
Carry
Assembler
AWG
9. A type of inductor used to block or choke off high frequencies
DRAM
ANSI
Choke
Decimal
10. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
DMA
Bandwidth
AHDL
Carry
11. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Vx=(Vs * Rx) /RT
Collector
TTL
ASCII
12. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bus contention
Assembly language
Clock
Norton's Theorem
13. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Address
Don't Care...
DTE
BEDO DRAM
14. In a division operation the quantity that is being divided
Dividend
Astable
Circular Mil (CM)
Baseline
15. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Capacitance
Array
Bit
Cascade
16. A connection at the midpoint of a winding in a transformer
Center Tap
Controller
Data bus
Comparator
17. A binary digit - which can be either 1 or 0
Bit
Binary
DSP
Circular Mil (CM)
18. The process of producing an output carry in full- adder when both input bits are 1s.
Carry generation
Array
Decoder
bed- of- nails
19. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Bit time
Boolean expression
Angular Velocity
TTL
20. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Base
Counter
Capacitance Reactance
Distributive Law
21. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Boolean expression
Bias
Distributive Law
Adjacency
22. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Buffer
Atom
Aliasing
AND
23. The smallest particle of an element possessing the unique characteristics of that element.
Kirchoff's Voltage Law
Atom
Bit time
Vx=(Vs * Rx) /RT
24. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Array
Demultiplexer
Balanced Load
Data
25. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Acceptor
AWG
Carry generation
Component
26. A set of interconnections that interface one or more devices based on a standardized specification
Bus
Capacitance
Bit time
Data Selector
27. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Thevenin Equivalent Circuit
Associative law
Band- pass filter
ANSI
28. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
CMOS
ALU
Amplitude
Circuit
29. Data Communications equipment
CMOS
DSP
CPLD
DCE
30. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Kirchoff's Current Law(KCL)
Addend
Debug
Data bus
31. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Bistable
Digital linear tape
Controller
Closed circuit
32. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Choke
Baseline
AND array
Distributive Law
33. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Clock
D Flip-Flop
ASCII
Apparent power
34. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Ampere- hour(Ah) rating
Cache memory
Cross - assembler
Admittance
35. The time from the application of a valid memory address to the appearance of valid output data
Binary
Access time
Bleeder Current
Counter
36. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Decode
Charge- coupled device
Band- pass filter
Dependency notation
37. The maximum value of a voltage or current
Bleeder Current
BIOS
Base
Amplitude
38. The digit generated when the sum of two binary digits exceeds 1
Carry
TTL
Kirchoff's Current Law(KCL)
Acceptor
39. Describes a number system with a base of ten
Decimal
Bitstream
Associative law
Dividend
40. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
Warning
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183
41. A circuit with a complete current path
DIMM
Address
Band- stop filter
Closed circuit
42. A logic circuit used to add two binary numbers
Kirchoff's Voltage Law
Adder
Delta Modulation
Augend
43. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
D Flip-Flop
AHDL
Capacitor
AND gate
44. A document that specifies parameter values and operating conditions for an integrated circuits or other device
AHDL
CMOS
BJT
Data Sheet
45. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
Demultiplexer
Capacitor
Dynamic Memory
46. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
CLB (Configurable Logic Block)
Dividend
Complement
Balanced Bridge
47. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
ASCII
bed- of- nails
Address
Delta Modulation
48. Having two opposites charge carriers within the transistor structure
Delta Modulation
Don't Care...
Bipolar
TTL
49. In addition - the number to which the addend is added
Base
Band- stop filter
Augend
Acceptor
50. Burst extended data output dynamic random- access memory
Capacitance Reactance
Diode
BEDO DRAM
Binary coded decimal
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