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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Dependency notation
Data Sheet
Clear
Dividend
2. Transistor-Transistor Logic and is implemented with bipolar junction transistors
AND gate
TTL
Decode
Norton's Theorem
3. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Balanced Bridge
BEDO DRAM
Capacitor
Combinational logic
4. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Decimal
Bidirectional shift Register
Architecture
Branch
5. Having two directions. the stored data can be shifted right or left
Bidirectional shift Register
Clear
Closed circuit
Architecture
6. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Array
Kirchoff's Current Law(KCL)
ABEL(Advance Boolean Expression Language)
AND gate
7. A circuit that prevents loading of an input or output
Buffer
Bleeder Current
Access time
Autotransformer
8. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Dynamic Memory
Base address
Comparator
Bode Plot
9. An array of AND gates consisting of a matrix of programmable interconnection
Combinational logic
AND array
DTE
Boolean expression
10. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Adder
Boundary scan
Compiler
Debug
11. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Data bus
Debug
Clock
TTL
12. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Compiler
Combinational logic
Capacitance Reactance
Cascade
13. American Standard Code for Information Interchange; the most widely used alphanumeric code.
ASCII
Choke
Dual in - line package
ALU
14. Digital Signal Processor; a special type of microprocessor that processes data in real time
Baseline
DSP
Amplitude
Decimal
15. A unit of the cross - sectional area of a wire.
Boolean expression
Data Selector
Circular Mil (CM)
Diode
16. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Augend
DAT
DTE
Demultiplexer
17. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
BEDO DRAM
ABEL(Advance Boolean Expression Language)
D Flip-Flop
Controller
18. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Counter
Binary
Comparator
AND gate
19. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
ALU
Decode
Bus interface unit
Branch
20. Data Communications equipment
Compiler
AWG
Buffer
DCE
21. Data Terminal equipment
Capacitor
Addend
DTE
Data bus
22. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Adjacency
Capacitance
Apparent power
Combinational logic
23. Consisting of numerals - letters - and other characters
DTE
Alphanumeric
Average value
Access time
24. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Bit
CPLD
Alphanumeric
Bandwidth
25. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
CPLD
ANSI
Atom
Bit time
26. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Concurrency
bed- of- nails
Decade
Associative law
27. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Capacitor
Comparator
Bit
CLB (Configurable Logic Block)
28. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
CPLD
Data bus
Baseline
Design flow
29. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Charge
Combinational logic
Demultiplexer
Capacitance
30. The unit of electrical current
Asynchronous counter
Ampere
Boolean addition
AND gate
31. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Base
DTE
Kirchoff's Voltage Law
Cross - assembler
32. One current path in a parallel circuit; a current path that connects two nodes
Bit
TTL
D Flip-Flop
Branch
33. The maximum value of a voltage or current
Comparator
DTE
Circuit Breaker
Amplitude
34. The beginning address of a segment of memory
Base address
Compiler
Dividend
Boolean addition
35. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
bed- of- nails
DRAM
Binary
Associative law
36. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Analog- to- digital (A/D) conversion
Capacitor
Analog- to- digital converter(ADC)
Apparent power
37. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
Band- pass filter
Comparator
Analog
BJT
38. A series of bits describing a final design that is sent to the target device during programming
Bitstream
Ampere- hour(Ah) rating
Control Bus
Decade Counter
39. The actual current in a branch
Cascade
Dynamic Memory
Design flow
Branch Current
40. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Charge
Concurrency
Average value
Admittance
41. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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183
42. The number of protons in a nucleus
Collector
Amplitude
Atomic number
Counter
43. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Assembler
Analog
Vx=(Vs * Rx) /RT
Controller
44. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
AHDL
Address Bus
BJT
DMA
45. A condition where all the load currents are equal and the neutral current is zero
Bias
Bus
CLB (Configurable Logic Block)
Balanced Load
46. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Commutative Law
Kirchoff's Current Law(KCL)
Binary coded decimal
Average value
47. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Capacitance Reactance
Carry propagation
Amplitude
Base
48. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Circuit
Bipolar
Acceptor
Analog- to- digital converter(ADC)
49. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
bed- of- nails
Charge- coupled device
CMOS Complementary Metal Oxide Semiconductor
Analog- to- digital (A/D) conversion
50. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Average value
Control Unit
Amplitude
Carry generation