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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The process of producing an output carry in full- adder when both input bits are 1s.
Bistable
Cross - assembler
Carry generation
Concurrency
2. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Thevenin Equivalent Circuit
Counter
Branch
Circuit
3. A program that converts English- like mnemonics into machine code
AND array
Assembler
ALU
Band- stop filter
4. Digital Signal Processor; a special type of microprocessor that processes data in real time
Choke
Central processing unit
Atom
DSP
5. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Code
Vx=(Vs * Rx) /RT
D Flip-Flop
Bus interface unit
6. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Cache memory
Control Bus
Circuit Breaker
Boolean expression
7. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Carry generation
Circular Mil (CM)
ALU
Distributive Law
8. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
CPLD
Bode Plot
Demultiplexer
Attenuation
9. A group of eight bits
Antifuse
Byte
Current sinking
Addend
10. A type of counter in which each stage is clocked from the output of the preceding stage.
Thevenin Equivalent Circuit
Diode
Demultiplexer
Asynchronous counter
11. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Data Sheet
Balanced Bridge
Branch
BIOS
12. The digit generated when the sum of two binary digits exceeds 1
Acceptor
Carry
Charge
Cross - assembler
13. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Comparator
Capacitance Reactance
Address
Augend
14. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Decrement
Band- stop filter
DAT
Concurrency
15. A logic gate that produces a High output only when all of the inputs are HIGH
Choke
Bus
Bus interface unit
AND gate
16. A class of integrated logic circuits that is implemented with a type of field effect transistor
Decode
Thevenin Equivalent Circuit
Base address
CMOS Complementary Metal Oxide Semiconductor
17. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Base address
Controller
Alphanumeric
Attenuation
18. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Controller
Angular Velocity
Augend
bed- of- nails
19. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Bus arbitration
Center Tap
Bandwidth
20. In addition - the number to which the addend is added
Augend
Carry
Buffer
Admittance
21. A device used to convert an analog signal to a sequence of digital codes
Ammeter
Charge
Base address
Analog- to- digital converter(ADC)
22. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
DAT
Autotransformer
bed- of- nails
Charge- coupled device
23. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Carry generation
Boolean expression
Design flow
Data Selector
24. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
D Flip-Flop
Decade
DCE
Code
25. Burst extended data output dynamic random- access memory
Admittance
Amplitude
BEDO DRAM
Thevenin Equivalent Circuit
26. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
AND
Diode
ANSI
Clear
27. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Decade
AHDL
CLB (Configurable Logic Block)
Counter
28. Having two directions. the stored data can be shifted right or left
Bidirectional shift Register
Bit time
Code
Balanced Bridge
29. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Buffer
ASCII
Capacitance
Dynamic Memory
30. Having two opposites charge carriers within the transistor structure
Balanced Load
Bitstream
Bipolar
ANSI
31. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Battery
Autotransformer
Data bus
AND array
32. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Asynchronous counter
Binary coded decimal
Bipolar
CMOS Complementary Metal Oxide Semiconductor
33. A resettable protective device used for interrupting execessive current in an electric circuit
Buffer
Circuit Breaker
Branch
ANSI
34. A set of interconnections that interface one or more devices based on a standardized specification
Bus
Decade
Dividend
Branch
35. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Adjacency
Data Sheet
Carry
Amplitude
36. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
DCE
bed- of- nails
Dividend
Boundary scan
37. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Circuit
Bleeder Current
BIOS
Address Bus
38. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Clock
Commutative Law
Battery
Acceptor
39. The beginning address of a segment of memory
Charge- coupled device
Address Bus
Base address
Data Selector
40. The ability of a capacitor to store electrical charge.
Capacitance
Angular Velocity
AND
Design flow
41. A type of IC package whose leads must pass through holes to the other side of a PC board
Charge
Access time
Dual in - line package
Boolean multiplication
42. Altera HDL; a nonstandard HDL
Bus
Amplitude
AHDL
Data Sheet
43. The action of a circuit in which it accepts current into its output from a load
Byte
Current sinking
Access time
Boolean algebra
44. The mathematics of logic circuits
Acceptor
ABEL(Advance Boolean Expression Language)
Data bus
Boolean algebra
45. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Assembly language
Don't Care...
Bus interface unit
Control Unit
46. A condition where all the load currents are equal and the neutral current is zero
Balanced Load
Boundary scan
DTE
Adder
47. In Boolean algebra - the OR operation
AWG
Access time
Dividend
Boolean addition
48. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bus contention
Assembler
Carry generation
Distributive Law
49. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Addend
Admittance
Cache memory
Circuit
50. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
CMOS Complementary Metal Oxide Semiconductor
Clock
Decoder