SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. In Boolean algebra - the OR operation
Capacity
Bus arbitration
CMOS
Boolean addition
2. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Debug
Closed circuit
Base address
Analog- to- digital converter(ADC)
3. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
bed- of- nails
Data Selector
Central processing unit
Thevenin Equivalent Circuit
4. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Bias
Associative law
Data
CLB (Configurable Logic Block)
5. The unit of electrical current
Cross - assembler
CMOS
Ampere
Design flow
6. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
AND
Bus
BEDO DRAM
Baseline
7. Digital Signal Processor; a special type of microprocessor that processes data in real time
DSP
Bias
Branch
Admittance
8. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Clear
ALU
Bidirectional shift Register
Decrement
9. Having two opposites charge carriers within the transistor structure
Bias
Bipolar
CPLD
Debug
10. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Boundary scan
Average value
Architecture
Circuit Breaker
11. The process that prevents two sources from using a bus at the same time
Astable
Bus arbitration
Carry generation
DTE
12. Altera HDL; a nonstandard HDL
BEDO DRAM
Control Unit
TTL
AHDL
13. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Bit time
Cache memory
Decade
AND gate
14. The digit generated when the sum of two binary digits exceeds 1
BEDO DRAM
Carry
Charge- coupled device
CPLD
15. Consisting of numerals - letters - and other characters
ABEL(Advance Boolean Expression Language)
Decoder
Alphanumeric
Atomic number
16. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
ALU
Array
Cascade
Aliasing
17. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Duty cycle
ABEL(Advance Boolean Expression Language)
DMA
Carry
18. The actual current in a branch
Balanced Load
Band- stop filter
Capacity
Branch Current
19. A resettable protective device used for interrupting execessive current in an electric circuit
Dual in - line package
Band- stop filter
Circuit Breaker
Antifuse
20. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Architecture
Ammeter
Bitstream
Admittance
21. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Capacitor
Boolean algebra
Bus arbitration
Baseline
22. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
BJT
Addend
Array
Complement
23. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Concurrency
Circuit
Asynchronous counter
Charge
24. The process or sequence of operations carried out to program a target device
Design flow
Boolean addition
Cache memory
DRAM
25. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Compiler
Control Bus
BIOS
Concurrency
26. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
D Flip-Flop
Cascade
Adjacency
Counter
27. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
DSP
Carry generation
Distributive Law
Analog
28. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Comparator
ANSI
Debug
Analog- to- digital (A/D) conversion
29. A receiving device on a bus
Atomic number
Capacity
Acceptor
Dividend
30. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Clear
BIOS
Distributive Law
DRAM
31. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Decode
Control Unit
Base address
Amplitude
32. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
33. The process of converting an analog signal to digital form
CMOS Complementary Metal Oxide Semiconductor
Analog- to- digital (A/D) conversion
Circular Mil (CM)
Bus arbitration
34. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Assembler
Balanced Bridge
Charge- coupled device
Branch
35. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Demultiplexer
Counter
Analog- to- digital converter(ADC)
Complement
36. The current left after the total load current is subtracted from the total current into the circuit
Dual in - line package
Carry generation
Bitstream
Bleeder Current
37. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Branch
Concurrency
Commutative Law
TTL
38. A programming language that uses English like words and has a one- to- one correspondence to machine language
DTE
Branch
BIOS
Assembly language
39. American National Standards Institute
Closed circuit
Bode Plot
Admittance
ANSI
40. Data Communications equipment
Concurrency
Cascade
Don't Care...
DCE
41. In a division operation the quantity that is being divided
Asynchronous counter
DSP
BIOS
Dividend
42. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Bleeder Current
AND
DAT
Data Selector
43. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Boolean expression
ASCII
Bit
Data
44. Dual in - line memory module
DIMM
Control Unit
Carry propagation
Code
45. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Antifuse
Addend
Boundary scan
CMOS
46. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Bit
Control Bus
Adjacency
47. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Bias
Closed circuit
Charge- coupled device
D Flip-Flop
48. A binary digit - which can be either 1 or 0
CMOS Complementary Metal Oxide Semiconductor
Bit
Dividend
Commutative Law
49. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Circuit Breaker
CMOS
Amplitude
Address Bus
50. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Alphanumeric
Amplitude
Delta Modulation
Collector