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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Bit time
Thevenin Equivalent Circuit
Atomic number
Carry
2. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Clear
Ammeter
Distributive Law
Demultiplexer
3. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Ammeter
Debug
Vx=(Vs * Rx) /RT
Atom
4. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Adder
Component
Bidirectional shift Register
Closed circuit
5. A logic circuit used to add two binary numbers
Analog- to- digital converter(ADC)
DRAM
CLB (Configurable Logic Block)
Adder
6. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Cross - assembler
Concurrency
Demultiplexer
Bipolar
7. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Dynamic Memory
Attenuation
Data Selector
Analog
8. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Bitstream
Commutative Law
Kirchoff's Current Law(KCL)
Battery
9. A semiconductor device that conducts current in only one direction
Average value
Diode
DTE
Digital linear tape
10. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Charge
Address
Comparator
DCE
11. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Bus arbitration
Bitstream
CMOS
Carry propagation
12. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
D Flip-Flop
Band- stop filter
Dividend
Kirchoff's Current Law(KCL)
13. An array of AND gates consisting of a matrix of programmable interconnection
AND array
Vx=(Vs * Rx) /RT
Associative law
Binary
14. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Boundary scan
Binary
Decoder
Circuit
15. In a division operation the quantity that is being divided
Alphanumeric
Decrement
Dividend
Clear
16. The process that prevents two sources from using a bus at the same time
Bus arbitration
Bit
D Flip-Flop
CLB (Configurable Logic Block)
17. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Antifuse
Circuit
Amplitude
Amplitude
18. A type of magnetic tape format
Bidirectional shift Register
Decade
Analog- to- digital (A/D) conversion
Digital linear tape
19. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Carry propagation
Ammeter
AND gate
Battery
20. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Code
Circuit
Collector
Norton's Theorem
21. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Dependency notation
Complement
bed- of- nails
Data Selector
22. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
AWG
Circular Mil (CM)
Balanced Bridge
Decade Counter
23. A unit of the cross - sectional area of a wire.
Circuit
Apparent power
Balanced Load
Circular Mil (CM)
24. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Bode Plot
Amplitude
ANSI
Distributive Law
25. Data Terminal equipment
Apparent power
Capacity
Array
DTE
26. The beginning address of a segment of memory
Address Bus
Base address
Antifuse
AND array
27. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Base
Bistable
Angular Velocity
Augend
28. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Counter
Collector
Attenuation
29. The unit of electrical current
Atom
Band- pass filter
Ampere
Bus contention
30. Having two opposites charge carriers within the transistor structure
Associative law
Bipolar
Bistable
Bitstream
31. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
Data Selector
Norton's Theorem
Carry
32. A digital circuit device that converts coded information into another (familiar) or noncoded form
Don't Care...
Decoder
Base address
Choke
33. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Apparent power
Ampere
Bandwidth
Kirchoff's Current Law(KCL)
34. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Augend
Associative law
Autotransformer
DRAM
35. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Dual in - line package
Bias
Baseline
Address Bus
36. Characterized by ten states or values
Binary
Bandwidth
Decade
ANSI
37. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Dual in - line package
AND
Comparator
Component
38. Sum of all the voltage drops in series equals to the source voltage
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39. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Commutative Law
Counter
Apparent power
Architecture
40. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Array
BIOS
Cascade
Data bus
41. American National Standards Institute
ANSI
Component
Bode Plot
D Flip-Flop
42. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Ampere- hour(Ah) rating
Capacity
Aliasing
ALU
43. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Acceptor
Bandwidth
Capacitor
Decoder
44. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Boolean expression
Analog
Decode
ANSI
45. The mathematics of logic circuits
Buffer
Boolean algebra
Branch
Bus contention
46. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Atom
DRAM
Data bus
Concurrency
47. Altera HDL; a nonstandard HDL
Amplitude
AHDL
Bus
Apparent power
48. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Central processing unit
Norton's Theorem
Data Sheet
DIMM
49. A condition where all the load currents are equal and the neutral current is zero
Kirchoff's Current Law(KCL)
Balanced Load
Amplitude
Assembler
50. The current left after the total load current is subtracted from the total current into the circuit
Bus arbitration
Bleeder Current
Collector
Control Unit