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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Data Communications equipment
DCE
ANSI
Carry
Carry propagation
2. A series of bits describing a final design that is sent to the target device during programming
Bit time
Circuit Breaker
Amplitude
Bitstream
3. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Counter
Decode
Controller
Control Unit
4. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Decode
Controller
Boolean algebra
Capacitance
5. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Cross - assembler
Adjacency
Architecture
AND
6. The unit of electrical current
Circular Mil (CM)
Balanced Load
Binary
Ampere
7. A logic circuit used to add two binary numbers
AND gate
Adder
Don't Care...
AWG
8. Having two stable states. Flip- flops and latches are bistable multivibrators.
Kirchoff's Current Law(KCL)
Binary
Bistable
Band- stop filter
9. Information in numeric - alphabetic - or other form.
Duty cycle
Data
CPLD
Analog
10. A connection at the midpoint of a winding in a transformer
Debug
DTE
Center Tap
Data
11. The process or sequence of operations carried out to program a target device
Design flow
Address
Current sinking
Augend
12. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Capacity
Carry
Band- stop filter
Counter
13. A program that converts English- like mnemonics into machine code
DAT
Assembler
Boolean algebra
Average value
14. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Dependency notation
CMOS
Capacitor
Baseline
15. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Distributive Law
Balanced Bridge
Bipolar
Code
16. A set of interconnections that interface one or more devices based on a standardized specification
Battery
Bus
AHDL
Boolean addition
17. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Branch
AND gate
Counter
Astable
18. Dual in - line memory module
BEDO DRAM
Data Sheet
DAT
DIMM
19. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Delta Modulation
Vx=(Vs * Rx) /RT
Ampere- hour(Ah) rating
Bidirectional shift Register
20. A semiconductor device that conducts current in only one direction
Diode
Analog- to- digital (A/D) conversion
Capacitance
Bistable
21. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Assembler
Architecture
BIOS
Duty cycle
22. An expression of variables and operators used to express the operation of a logic circuit
Bleeder Current
Boolean expression
CMOS Complementary Metal Oxide Semiconductor
Augend
23. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Dependency notation
Binary
Atomic number
TTL
24. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Bitstream
ABEL(Advance Boolean Expression Language)
Band- pass filter
Battery
25. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Admittance
Decode
Complement
Address Bus
26. To decrease the binary state of a counter by one
Decrement
Admittance
Bistable
Charge- coupled device
27. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Capacity
Branch
Bus interface unit
Apparent power
28. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Choke
Average value
Data
Carry generation
29. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Combinational logic
Carry propagation
Average value
Apparent power
30. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Adder
Norton's Theorem
Associative law
Bus contention
31. The process that prevents two sources from using a bus at the same time
ANSI
Capacitance Reactance
Bus arbitration
Analog- to- digital (A/D) conversion
32. A binary digit - which can be either 1 or 0
Bit
Angular Velocity
Circuit
Carry
33. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Duty cycle
Ampere
Attenuation
Cache memory
34. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Counter
Ampere
TTL
Data
35. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Clock
Adder
Closed circuit
Autotransformer
36. The number of protons in a nucleus
Dual in - line package
Bipolar
Atomic number
Clock
37. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Access time
Clock
Address Bus
bed- of- nails
38. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Component
Balanced Bridge
Amplitude
Antifuse
39. A type of IC package whose leads must pass through holes to the other side of a PC board
Dual in - line package
Data Sheet
Byte
Carry propagation
40. A logic gate that produces a High output only when all of the inputs are HIGH
Aliasing
Access time
AND gate
Design flow
41. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
Duty cycle
CPLD
Array
Address
42. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Adder
Balanced Load
Antifuse
Bit time
43. A method of analog- to- digital conversion using a 1- bit quantization process
Capacity
Addend
Augend
Delta Modulation
44. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Dividend
Combinational logic
Decoder
Band- stop filter
45. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Don't Care...
Compiler
Bias
Binary
46. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
BEDO DRAM
ANSI
Cache memory
Baseline
47. A combined coder and decoder
Charge- coupled device
Demultiplexer
Addend
Code
48. Digital Signal Processor; a special type of microprocessor that processes data in real time
CPLD
Antifuse
CLB (Configurable Logic Block)
DSP
49. The process of converting an analog signal to digital form
Kirchoff's Current Law(KCL)
Carry
Analog- to- digital (A/D) conversion
Complement
50. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Collector
Bus interface unit
Control Unit
Dynamic Memory