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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. To decrease the binary state of a counter by one
Buffer
Decrement
Addend
Analog- to- digital converter(ADC)
2. An array of AND gates consisting of a matrix of programmable interconnection
DIMM
AHDL
Carry propagation
AND array
3. An electrical instrument used to measure current
Array
Combinational logic
Ammeter
Charge- coupled device
4. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Attenuation
Acceptor
Analog- to- digital (A/D) conversion
Center Tap
5. A type of inductor used to block or choke off high frequencies
Astable
Choke
Carry
Delta Modulation
6. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
BIOS
Buffer
Boolean addition
Adjacency
7. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Demultiplexer
Decoder
Charge- coupled device
Charge
8. The ability of a capacitor to store electrical charge.
Capacitance
Branch Current
Delta Modulation
Code
9. The application of a dc voltage to an electronic device to produce a desired mode of operation
Base
Adder
Bias
CMOS
10. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
CPLD
Commutative Law
Capacity
Bandwidth
11. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Amplitude
Balanced Load
Branch
Antifuse
12. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Capacitor
Access time
Debug
Component
13. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Bit
Circuit
Circular Mil (CM)
Capacitance
14. Characterized by ten states or values
Cache memory
Decade
Apparent power
DTE
15. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Debug
AHDL
CLB (Configurable Logic Block)
Demultiplexer
16. The beginning address of a segment of memory
Base address
Byte
DTE
Atomic number
17. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Capacitor
AND
Bode Plot
ANSI
18. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Bus interface unit
Decade
Central processing unit
Ampere
19. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Decode
Code
Band- stop filter
BIOS
20. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
DAT
bed- of- nails
Bitstream
BJT
21. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Binary coded decimal
Carry generation
Charge- coupled device
Astable
22. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Cache memory
Decode
Data
Concurrency
23. The actual current in a branch
Kirchoff's Current Law(KCL)
Branch Current
Design flow
CMOS
24. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Comparator
Acceptor
Delta Modulation
bed- of- nails
25. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Assembler
Cascade
AND gate
Comparator
26. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
ASCII
Carry propagation
D Flip-Flop
Band- stop filter
27. A combined coder and decoder
DRAM
Alphanumeric
Code
Compiler
28. The action of a circuit in which it accepts current into its output from a load
Asynchronous counter
Assembler
Current sinking
Decrement
29. In a division operation the quantity that is being divided
Baseline
AND array
Decode
Dividend
30. A method of analog- to- digital conversion using a 1- bit quantization process
Delta Modulation
Digital linear tape
BIOS
Charge- coupled device
31. In Boolean algebra - the OR operation
Access time
Carry generation
Boolean addition
Assembly language
32. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
DIMM
Bistable
Balanced Bridge
Array
33. One of the three regions in a bipolar junction transistor
Base
Cascade
Asynchronous counter
Battery
34. A resettable protective device used for interrupting execessive current in an electric circuit
Diode
Analog- to- digital converter(ADC)
Circuit Breaker
Bistable
35. The number of protons in a nucleus
Atomic number
Decrement
Charge- coupled device
Bus interface unit
36. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Apparent power
Bus interface unit
Dynamic Memory
Bipolar
37. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
CMOS
DMA
Base
Bias
38. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
DRAM
Duty cycle
Assembler
Combinational logic
39. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Dividend
Antifuse
Cascade
Data Sheet
40. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
CMOS
Code
Controller
Analog
41. Data Terminal equipment
Controller
Carry
DTE
Assembler
42. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
AND gate
Component
Debug
Center Tap
43. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
AND gate
Collector
Balanced Bridge
Amplitude
44. A digital circuit device that converts coded information into another (familiar) or noncoded form
Decoder
CMOS
Duty cycle
Cache memory
45. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Counter
Circular Mil (CM)
Delta Modulation
Clock
46. A series of bits describing a final design that is sent to the target device during programming
Address
Boolean algebra
Bitstream
Clear
47. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Boundary scan
Decade
Ampere
Bidirectional shift Register
48. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Control Bus
Augend
Clear
AND array
49. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Clock
Attenuation
Clear
Balanced Bridge
50. In Boolean algebra - the AND operation
Collector
Circuit
Boolean algebra
Boolean multiplication