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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Capacitor
Amplitude
Data Selector
Access time
2. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Debug
Bus
Bit time
Bode Plot
3. Sum of all the voltage drops in series equals to the source voltage
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4. The ability of a capacitor to store electrical charge.
Aliasing
Capacitance
Central processing unit
Access time
5. In addition - the number that is added to another number called the augend
Access time
Carry propagation
Addend
Battery
6. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Boolean addition
Battery
DMA
Debug
7. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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8. An electrical instrument used to measure current
Adjacency
Counter
Ammeter
DMA
9. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Data Selector
DAT
Address
Bandwidth
10. The process of producing an output carry in full- adder when both input bits are 1s.
Buffer
Decade Counter
Carry generation
Amplitude
11. A combined coder and decoder
Code
Distributive Law
Data bus
Antifuse
12. A logic gate that produces a High output only when all of the inputs are HIGH
AND gate
Aliasing
Comparator
Duty cycle
13. Having two directions. the stored data can be shifted right or left
Bidirectional shift Register
Boundary scan
Address Bus
BEDO DRAM
14. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Combinational logic
Clear
Diode
Demultiplexer
15. A type of inductor used to block or choke off high frequencies
Bus arbitration
Data Selector
Decade
Choke
16. A program that converts English- like mnemonics into machine code
AWG
Address
Assembler
Circuit
17. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Bandwidth
Charge- coupled device
Architecture
Decade Counter
18. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Controller
Base address
Circuit Breaker
Closed circuit
19. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
DMA
Control Bus
Attenuation
TTL
20. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Dependency notation
Distributive Law
Duty cycle
Cascade
21. Having two stable states. Flip- flops and latches are bistable multivibrators.
ASCII
Cache memory
Bistable
Addend
22. The current left after the total load current is subtracted from the total current into the circuit
Collector
Augend
Vx=(Vs * Rx) /RT
Bleeder Current
23. A unit of the cross - sectional area of a wire.
Array
Autotransformer
Circular Mil (CM)
CLB (Configurable Logic Block)
24. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Address
Assembler
Ampere- hour(Ah) rating
Vx=(Vs * Rx) /RT
25. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Clock
Decrement
Data bus
Carry propagation
26. A class of integrated logic circuits that is implemented with a type of field effect transistor
CMOS Complementary Metal Oxide Semiconductor
Balanced Load
Antifuse
Circuit
27. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Design flow
Boundary scan
Boolean algebra
Adjacency
28. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
AND array
Center Tap
Aliasing
AWG
29. A device used to convert an analog signal to a sequence of digital codes
Carry propagation
Apparent power
Data Sheet
Analog- to- digital converter(ADC)
30. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Circuit
Adjacency
Autotransformer
Carry propagation
31. A set of interconnections that interface one or more devices based on a standardized specification
Delta Modulation
Controller
Augend
Bus
32. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Band- stop filter
Bandwidth
Current sinking
Circuit Breaker
33. The smallest particle of an element possessing the unique characteristics of that element.
BJT
Band- stop filter
Atom
Clock
34. A digital counter having ten states
Aliasing
Concurrency
DAT
Decade Counter
35. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Bus
Apparent power
Branch
Capacitance Reactance
36. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
DRAM
Buffer
Binary
DIMM
37. Burst extended data output dynamic random- access memory
Bidirectional shift Register
Combinational logic
BEDO DRAM
Acceptor
38. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
BIOS
Circuit
DCE
Kirchoff's Current Law(KCL)
39. The ratio of pulse width to period expressed as a percentage
Duty cycle
Boolean multiplication
Address Bus
Component
40. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Complement
Branch Current
Control Unit
Circular Mil (CM)
41. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Base address
Control Bus
Distributive Law
Assembler
42. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bistable
Augend
Bus contention
Base
43. The application of a dc voltage to an electronic device to produce a desired mode of operation
Bias
Norton's Theorem
Boundary scan
Capacitance Reactance
44. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Clock
Choke
Array
Circuit
45. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
BEDO DRAM
Analog
Choke
46. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Admittance
BEDO DRAM
Binary coded decimal
Bandwidth
47. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Center Tap
DMA
Decade
Clock
48. Consisting of numerals - letters - and other characters
Closed circuit
Balanced Bridge
Alphanumeric
CPLD
49. Having two opposites charge carriers within the transistor structure
Assembler
Analog- to- digital converter(ADC)
Bipolar
Clear
50. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Admittance
Acceptor
Balanced Load
Commutative Law