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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. To decrease the binary state of a counter by one
Autotransformer
Decrement
Combinational logic
Data bus
2. A connection at the midpoint of a winding in a transformer
Center Tap
Control Bus
Acceptor
Alphanumeric
3. In a division operation the quantity that is being divided
Ampere- hour(Ah) rating
Decoder
CMOS
Dividend
4. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Distributive Law
Choke
Duty cycle
Clock
5. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Bit time
BIOS
Control Bus
Charge
6. A digital circuit device that converts coded information into another (familiar) or noncoded form
Binary
Cache memory
Decoder
ASCII
7. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Ampere- hour(Ah) rating
Commutative Law
Counter
Band- pass filter
8. A type of inductor used to block or choke off high frequencies
Amplitude
Choke
Acceptor
ANSI
9. A circuit that prevents loading of an input or output
Apparent power
DCE
Buffer
Ammeter
10. Having two opposites charge carriers within the transistor structure
Decade Counter
Bitstream
Bipolar
Boolean expression
11. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Dynamic Memory
AND
Carry generation
Address
12. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
AND gate
Dynamic Memory
DIMM
Don't Care...
13. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Complement
BJT
CMOS
Diode
14. American National Standards Institute
Control Bus
Adjacency
ANSI
Duty cycle
15. A binary digit - which can be either 1 or 0
Bit
Ammeter
Balanced Bridge
CLB (Configurable Logic Block)
16. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Dependency notation
Assembly language
Battery
Design flow
17. In addition - the number that is added to another number called the augend
BEDO DRAM
Bistable
Bandwidth
Addend
18. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Capacitance
Access time
Capacitor
Clear
19. Consisting of numerals - letters - and other characters
Alphanumeric
Bit time
Addend
Collector
20. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Amplitude
DCE
Carry
Binary coded decimal
21. A class of integrated logic circuits that is implemented with a type of field effect transistor
Don't Care...
Band- pass filter
Base
CMOS Complementary Metal Oxide Semiconductor
22. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Band- pass filter
Demultiplexer
Data Selector
Array
23. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Central processing unit
BEDO DRAM
Angular Velocity
Array
24. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Cache memory
Decimal
Analog
Counter
25. Digital audio tape; a type of magnetic tape format
DAT
Clock
Decrement
DRAM
26. Characterized by ten states or values
Decade Counter
Clock
Decade
Boolean multiplication
27. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Decode
Central processing unit
Array
Alphanumeric
28. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Decimal
AND
Debug
Boundary scan
29. A condition where all the load currents are equal and the neutral current is zero
Balanced Load
Antifuse
Adder
Decade Counter
30. The process that prevents two sources from using a bus at the same time
Don't Care...
Bus arbitration
Ampere- hour(Ah) rating
Decoder
31. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Array
TTL
Code
Bus contention
32. A semiconductor device that conducts current in only one direction
Ampere- hour(Ah) rating
Assembler
Data bus
Diode
33. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Array
Adder
Address Bus
Control Bus
34. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Cross - assembler
DRAM
bed- of- nails
Circuit Breaker
35. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Boolean expression
AHDL
Aliasing
Binary coded decimal
36. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
Decrement
Bipolar
Decoder
37. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Admittance
Access time
Balanced Load
Binary coded decimal
38. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Thevenin Equivalent Circuit
Associative law
Dependency notation
Control Bus
39. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Autotransformer
Decode
Carry propagation
Attenuation
40. Digital Signal Processor; a special type of microprocessor that processes data in real time
Balanced Bridge
Atom
DSP
Diode
41. Having two directions. the stored data can be shifted right or left
Cache memory
Attenuation
DIMM
Bidirectional shift Register
42. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Dependency notation
Circuit
Dynamic Memory
CMOS
43. Having two stable states. Flip- flops and latches are bistable multivibrators.
Debug
Current sinking
Bistable
Boolean multiplication
44. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Concurrency
ABEL(Advance Boolean Expression Language)
DIMM
Analog
45. A logic circuit used to add two binary numbers
BEDO DRAM
Alphanumeric
Adder
Vx=(Vs * Rx) /RT
46. A programming language that uses English like words and has a one- to- one correspondence to machine language
Base
Bitstream
Assembly language
Capacity
47. The unit of electrical current
Apparent power
Ampere
Dividend
Base address
48. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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49. Sum of all the voltage drops in series equals to the source voltage
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50. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Atomic number
Collector
ASCII
Circuit