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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Kirchoff's Current Law(KCL)
DIMM
Bipolar
DRAM
2. A combined coder and decoder
Angular Velocity
DSP
Code
Bus
3. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
DMA
DCE
Band- stop filter
Analog- to- digital (A/D) conversion
4. The actual current in a branch
Branch Current
BIOS
Admittance
Angular Velocity
5. The process or sequence of operations carried out to program a target device
Control Unit
Design flow
Clear
Kirchoff's Voltage Law
6. A unit of the cross - sectional area of a wire.
Capacity
Circular Mil (CM)
Adder
Decode
7. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
BJT
Capacitor
Component
DAT
8. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Ampere
ASCII
TTL
Architecture
9. A class of integrated logic circuits that is implemented with a type of field effect transistor
Commutative Law
Decoder
CMOS Complementary Metal Oxide Semiconductor
Center Tap
10. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Center Tap
Average value
Data Sheet
ASCII
11. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Duty cycle
Demultiplexer
Capacity
Concurrency
12. A digital counter having ten states
Dependency notation
Ampere
DMA
Decade Counter
13. A type of counter in which each stage is clocked from the output of the preceding stage.
BJT
Asynchronous counter
Antifuse
Baseline
14. A logic circuit used to add two binary numbers
Bus interface unit
Bistable
Base address
Adder
15. A semiconductor device that conducts current in only one direction
Bitstream
Design flow
Diode
Bleeder Current
16. A type of magnetic tape format
Angular Velocity
Norton's Theorem
Digital linear tape
Associative law
17. A software compiler language for SPLD programming; a type of hardware description language (HDL)
CPLD
Carry generation
ABEL(Advance Boolean Expression Language)
Capacity
18. Describes a number system with a base of ten
Complement
Capacity
Component
Decimal
19. The beginning address of a segment of memory
Base address
Average value
Amplitude
DSP
20. One of the three regions in a bipolar junction transistor
Circular Mil (CM)
Base
Bitstream
Band- pass filter
21. The current left after the total load current is subtracted from the total current into the circuit
Closed circuit
Bleeder Current
Analog- to- digital converter(ADC)
Decade
22. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
DMA
Ampere
Capacitance Reactance
Dual in - line package
23. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Aliasing
Binary coded decimal
Bipolar
Associative law
24. A series of bits describing a final design that is sent to the target device during programming
Dynamic Memory
Carry propagation
Clock
Bitstream
25. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Diode
Carry propagation
Binary coded decimal
bed- of- nails
26. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Capacitor
Data Selector
Adder
Balanced Load
27. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Attenuation
Compiler
Binary coded decimal
Central processing unit
28. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Circular Mil (CM)
Boundary scan
bed- of- nails
Base address
29. A type of inductor used to block or choke off high frequencies
Choke
DAT
CMOS
Branch
30. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Thevenin Equivalent Circuit
Clear
Ampere- hour(Ah) rating
ASCII
31. The ability of a capacitor to store electrical charge.
Balanced Load
Antifuse
Capacitance
Debug
32. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Bit time
AND
Cache memory
Decoder
33. Consisting of numerals - letters - and other characters
AHDL
Bus arbitration
Alphanumeric
Analog
34. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Clock
Cascade
Address Bus
Architecture
35. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
BIOS
Kirchoff's Voltage Law
Atom
Decode
36. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Counter
Current sinking
ASCII
Bus
37. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
Controller
Kirchoff's Current Law(KCL)
Vx=(Vs * Rx) /RT
38. Having two directions. the stored data can be shifted right or left
Design flow
Demultiplexer
Analog- to- digital converter(ADC)
Bidirectional shift Register
39. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CLB (Configurable Logic Block)
Apparent power
Clock
Alphanumeric
40. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Design flow
Branch Current
D Flip-Flop
Apparent power
41. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bus contention
Diode
Bipolar
Address
42. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Bandwidth
Binary
Battery
Counter
43. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Bidirectional shift Register
DIMM
Comparator
CMOS Complementary Metal Oxide Semiconductor
44. To decrease the binary state of a counter by one
Decrement
Complement
Balanced Bridge
Digital linear tape
45. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Bus interface unit
Atom
Attenuation
Atomic number
46. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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47. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Address
Assembler
Boolean addition
Thevenin Equivalent Circuit
48. Digital Signal Processor; a special type of microprocessor that processes data in real time
Circuit Breaker
DSP
Bus interface unit
Circuit
49. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Charge
Data bus
Digital linear tape
Circuit
50. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Capacity
Antifuse
Decoder
Address Bus