SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Analog- to- digital (A/D) conversion
Capacitance
Dependency notation
DCE
2. To decrease the binary state of a counter by one
Cache memory
Decrement
Bus contention
Binary
3. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Counter
Demultiplexer
Bipolar
Antifuse
4. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Asynchronous counter
Compiler
Clear
Charge- coupled device
5. The action of a circuit in which it accepts current into its output from a load
Component
Data
Control Bus
Current sinking
6. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Data
DAT
Apparent power
Thevenin Equivalent Circuit
7. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Cache memory
Bleeder Current
Charge
Ammeter
8. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Attenuation
Capacitance
Bus contention
Boundary scan
9. In Boolean algebra - the OR operation
Boolean algebra
DTE
Boolean addition
Bitstream
10. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
11. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Comparator
CLB (Configurable Logic Block)
Cross - assembler
Clear
12. Burst extended data output dynamic random- access memory
bed- of- nails
BEDO DRAM
Control Bus
Decimal
13. One current path in a parallel circuit; a current path that connects two nodes
ALU
Balanced Load
Branch
Concurrency
14. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Dividend
Carry
Aliasing
Central processing unit
15. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Commutative Law
Ampere- hour(Ah) rating
Code
Norton's Theorem
16. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Component
Concurrency
Combinational logic
Circular Mil (CM)
17. A class of integrated logic circuits that is implemented with a type of field effect transistor
Bidirectional shift Register
CMOS Complementary Metal Oxide Semiconductor
DTE
Decoder
18. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Capacity
Control Unit
Capacitance Reactance
Kirchoff's Current Law(KCL)
19. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
CPLD
DRAM
Cascade
Concurrency
20. A circuit with a complete current path
Closed circuit
Boolean expression
Boundary scan
Ampere- hour(Ah) rating
21. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Array
Baseline
Clock
Bus interface unit
22. In addition - the number that is added to another number called the augend
Autotransformer
DSP
Addend
Dividend
23. Consisting of numerals - letters - and other characters
CPLD
Alphanumeric
Thevenin Equivalent Circuit
Charge
24. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Access time
Circuit
Decode
Data Selector
25. In a division operation the quantity that is being divided
Dividend
Bus interface unit
Ampere- hour(Ah) rating
Decade
26. American National Standards Institute
Bipolar
Duty cycle
ANSI
AND gate
27. A type of inductor used to block or choke off high frequencies
DRAM
Byte
Closed circuit
Choke
28. A transformer in which the primary and secondary are in a single winding
Associative law
Alphanumeric
Autotransformer
Ampere
29. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Boolean addition
BEDO DRAM
Clear
Dependency notation
30. Describes a number system with a base of ten
Digital linear tape
Decimal
Center Tap
Bus arbitration
31. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Buffer
Control Unit
Comparator
Asynchronous counter
32. One of the three regions in a bipolar junction transistor
Bus arbitration
Clear
Base
Balanced Load
33. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Debug
Thevenin Equivalent Circuit
Capacitor
CMOS Complementary Metal Oxide Semiconductor
34. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Circuit
Cascade
Capacitance Reactance
Collector
35. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
CMOS
Cache memory
Bus arbitration
DTE
36. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Concurrency
Amplitude
Band- pass filter
Binary coded decimal
37. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Branch Current
Kirchoff's Current Law(KCL)
DRAM
Array
38. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
AND gate
Don't Care...
Boundary scan
Decoder
39. The process or sequence of operations carried out to program a target device
BEDO DRAM
Data Selector
Circuit
Design flow
40. A software compiler language for SPLD programming; a type of hardware description language (HDL)
ABEL(Advance Boolean Expression Language)
Analog
Access time
Cache memory
41. A receiving device on a bus
Band- stop filter
Boundary scan
Clock
Acceptor
42. An electrical instrument used to measure current
Acceptor
DMA
Array
Ammeter
43. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Binary
Combinational logic
Carry
AHDL
44. The process of converting an analog signal to digital form
DMA
Acceptor
Analog- to- digital (A/D) conversion
Component
45. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
ALU
Array
Adder
Control Unit
46. A program that converts English- like mnemonics into machine code
Assembler
Assembly language
Dual in - line package
Component
47. The beginning address of a segment of memory
Antifuse
Base address
Closed circuit
Decrement
48. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Data Sheet
AND gate
Alphanumeric
BEDO DRAM
49. Altera HDL; a nonstandard HDL
CLB (Configurable Logic Block)
AHDL
Assembler
Address
50. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Capacitance
DCE
Attenuation
Charge- coupled device