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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The action of a circuit in which it accepts current into its output from a load
Boolean multiplication
Current sinking
Central processing unit
Bit
2. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Branch
Data
Array
Angular Velocity
3. To decrease the binary state of a counter by one
Decrement
Base address
Angular Velocity
Carry generation
4. Sum of all the voltage drops in series equals to the source voltage
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5. Data Communications equipment
DCE
CMOS Complementary Metal Oxide Semiconductor
BEDO DRAM
Boundary scan
6. The digit generated when the sum of two binary digits exceeds 1
Charge- coupled device
Carry
Commutative Law
Attenuation
7. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Carry
Kirchoff's Voltage Law
Alphanumeric
Balanced Bridge
8. The beginning address of a segment of memory
Base address
Controller
AND gate
Charge- coupled device
9. A method of analog- to- digital conversion using a 1- bit quantization process
Data
DMA
Delta Modulation
Digital linear tape
10. Data Terminal equipment
DTE
Circuit Breaker
Attenuation
Address
11. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Counter
Cache memory
Bit time
ASCII
12. Having two directions. the stored data can be shifted right or left
Bidirectional shift Register
Bandwidth
Buffer
Array
13. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Circuit
Astable
DTE
Comparator
14. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Analog- to- digital (A/D) conversion
Branch Current
AND
15. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Capacity
Attenuation
Aliasing
Baseline
16. A software compiler language for SPLD programming; a type of hardware description language (HDL)
CLB (Configurable Logic Block)
Decoder
ABEL(Advance Boolean Expression Language)
AHDL
17. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
CMOS
Dividend
Bleeder Current
18. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Battery
ALU
Capacitance
Analog- to- digital (A/D) conversion
19. Information in numeric - alphabetic - or other form.
Control Unit
Data
Combinational logic
Closed circuit
20. A class of integrated logic circuits that is implemented with a type of field effect transistor
Binary
Duty cycle
CMOS Complementary Metal Oxide Semiconductor
Address Bus
21. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
bed- of- nails
Array
AWG
Analog
22. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Capacitance Reactance
Dual in - line package
Capacitance
Aliasing
23. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
bed- of- nails
Data bus
Clock
Decrement
24. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Bode Plot
Dynamic Memory
Bistable
Dividend
25. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Acceptor
Boolean expression
Vx=(Vs * Rx) /RT
Bus contention
26. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Counter
Band- pass filter
Carry
Ampere
27. A combined coder and decoder
Cascade
Adder
AND array
Code
28. A set of interconnections that interface one or more devices based on a standardized specification
Capacitance
Closed circuit
Bus
Asynchronous counter
29. Consisting of numerals - letters - and other characters
Alphanumeric
Bus interface unit
Astable
Collector
30. The current left after the total load current is subtracted from the total current into the circuit
Bleeder Current
Base address
Decode
Dependency notation
31. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Kirchoff's Current Law(KCL)
ANSI
Band- pass filter
Ampere- hour(Ah) rating
32. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Autotransformer
Addend
Boolean algebra
Thevenin Equivalent Circuit
33. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Decoder
Bus interface unit
Combinational logic
Balanced Load
34. The process or sequence of operations carried out to program a target device
CPLD
Comparator
Design flow
Acceptor
35. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Clear
Central processing unit
Circuit Breaker
ALU
36. A type of magnetic tape format
Dynamic Memory
Adder
Thevenin Equivalent Circuit
Digital linear tape
37. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Collector
BEDO DRAM
ALU
Array
38. A receiving device on a bus
Byte
Battery
Acceptor
Charge
39. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Boolean algebra
DMA
Binary coded decimal
Aliasing
40. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Band- stop filter
Demultiplexer
Astable
Boundary scan
41. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Thevenin Equivalent Circuit
Choke
Circular Mil (CM)
Demultiplexer
42. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Baseline
Analog- to- digital converter(ADC)
Ammeter
Charge- coupled device
43. A circuit with a complete current path
Assembly language
Decrement
DRAM
Closed circuit
44. The number of protons in a nucleus
Decade Counter
Byte
Bidirectional shift Register
Atomic number
45. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Charge
Boolean multiplication
Apparent power
Decrement
46. A program that converts English- like mnemonics into machine code
Assembler
Autotransformer
Decimal
Data Selector
47. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Baseline
Data Selector
Clock
Analog
48. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Band- pass filter
Current sinking
Battery
AND array
49. Having two opposites charge carriers within the transistor structure
Counter
Balanced Bridge
Bipolar
Atom
50. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Decode
Addend
Data bus
D Flip-Flop