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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
CPLD
Circuit
Capacitor
Asynchronous counter
2. The ratio of pulse width to period expressed as a percentage
Balanced Bridge
AND
Angular Velocity
Duty cycle
3. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Base
Average value
DIMM
Cascade
4. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Data bus
Bandwidth
Branch
Collector
5. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Bit
Band- stop filter
Bit time
Design flow
6. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
BJT
Closed circuit
Circular Mil (CM)
7. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Capacitance Reactance
Branch Current
Digital linear tape
Base address
8. A series of bits describing a final design that is sent to the target device during programming
Bitstream
BJT
Bias
Norton's Theorem
9. In Boolean algebra - the OR operation
Boolean addition
Associative law
Data
Atomic number
10. A software compiler language for SPLD programming; a type of hardware description language (HDL)
AWG
Base address
ABEL(Advance Boolean Expression Language)
Asynchronous counter
11. A connection at the midpoint of a winding in a transformer
Boolean addition
Thevenin Equivalent Circuit
Bandwidth
Center Tap
12. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Circuit Breaker
Concurrency
Array
Acceptor
13. A method of analog- to- digital conversion using a 1- bit quantization process
Delta Modulation
Charge
Dependency notation
Bode Plot
14. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Kirchoff's Voltage Law
Counter
Angular Velocity
Decimal
15. The unit of electrical current
ALU
Center Tap
Ampere
Angular Velocity
16. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Band- stop filter
Center Tap
BJT
Vx=(Vs * Rx) /RT
17. Characterized by ten states or values
Charge
Decade
Dividend
Don't Care...
18. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
Data Selector
bed- of- nails
Cross - assembler
CPLD
19. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Battery
Bandwidth
TTL
Cross - assembler
20. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Balanced Bridge
Circular Mil (CM)
Cross - assembler
Demultiplexer
21. Having two directions. the stored data can be shifted right or left
Analog- to- digital converter(ADC)
Bidirectional shift Register
Component
Analog- to- digital (A/D) conversion
22. A set of interconnections that interface one or more devices based on a standardized specification
Bandwidth
Bode Plot
Bus
Control Unit
23. The application of a dc voltage to an electronic device to produce a desired mode of operation
Assembler
Bias
Data bus
BIOS
24. The digit generated when the sum of two binary digits exceeds 1
Aliasing
Data bus
Decrement
Carry
25. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Band- pass filter
TTL
Amplitude
Capacity
26. A logic gate that produces a High output only when all of the inputs are HIGH
AND gate
Boolean addition
Bipolar
Amplitude
27. Information in numeric - alphabetic - or other form.
Data
Boolean expression
Bistable
Capacitance Reactance
28. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Debug
Data
Buffer
Control Unit
29. A digital circuit device that converts coded information into another (familiar) or noncoded form
Concurrency
Bit
Circuit Breaker
Decoder
30. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Buffer
Data Selector
Ammeter
Choke
31. A class of integrated logic circuits that is implemented with a type of field effect transistor
CMOS Complementary Metal Oxide Semiconductor
CLB (Configurable Logic Block)
Boolean multiplication
Circuit
32. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Associative law
Demultiplexer
BIOS
DRAM
33. A unit of the cross - sectional area of a wire.
Bit
Bias
Circular Mil (CM)
Adder
34. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Binary coded decimal
Bistable
Admittance
Balanced Load
35. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Decoder
Duty cycle
Concurrency
Bus contention
36. Data Communications equipment
Collector
Ampere- hour(Ah) rating
DCE
Battery
37. Dual in - line memory module
DIMM
Vx=(Vs * Rx) /RT
Counter
Circuit Breaker
38. Describes a number system with a base of ten
Duty cycle
Decade Counter
Decimal
BJT
39. Burst extended data output dynamic random- access memory
Decoder
BEDO DRAM
Debug
Address
40. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Band- pass filter
DAT
Compiler
Ampere
41. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Carry generation
AND gate
Band- pass filter
Dividend
42. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Adjacency
Analog- to- digital (A/D) conversion
Data Selector
Dynamic Memory
43. The time from the application of a valid memory address to the appearance of valid output data
AND gate
Capacity
Access time
Cache memory
44. The process of producing an output carry in full- adder when both input bits are 1s.
Capacitor
Carry generation
Boolean addition
Dual in - line package
45. In addition - the number to which the addend is added
ANSI
Augend
Current sinking
Center Tap
46. The beginning address of a segment of memory
Base address
Array
Ammeter
Attenuation
47. The actual current in a branch
Current sinking
Demultiplexer
Band- stop filter
Branch Current
48. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Boolean multiplication
Autotransformer
Analog
Admittance
49. A device used to convert an analog signal to a sequence of digital codes
Analog- to- digital converter(ADC)
Access time
Apparent power
Distributive Law
50. Digital audio tape; a type of magnetic tape format
DAT
Associative law
Acceptor
Architecture