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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The process or sequence of operations carried out to program a target device
Design flow
Adder
Boolean algebra
AND
2. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Diode
Capacitance Reactance
Dynamic Memory
AND gate
3. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Design flow
Apparent power
Cache memory
Distributive Law
4. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
Design flow
Adder
Distributive Law
5. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Baseline
Base
Vx=(Vs * Rx) /RT
TTL
6. The unit of electrical current
Battery
Ampere
Design flow
Bus interface unit
7. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Augend
BIOS
Data bus
Controller
8. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Dynamic Memory
Decade Counter
Collector
Carry generation
9. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
10. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Don't Care...
BJT
DRAM
Complement
11. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Clear
Vx=(Vs * Rx) /RT
Decode
Battery
12. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Bus arbitration
BEDO DRAM
Antifuse
Central processing unit
13. In a division operation the quantity that is being divided
Bus contention
CLB (Configurable Logic Block)
Dividend
Base address
14. A condition where all the load currents are equal and the neutral current is zero
Concurrency
D Flip-Flop
Branch
Balanced Load
15. A logic circuit used to add two binary numbers
Adder
Dependency notation
AND array
Decode
16. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Dynamic Memory
Central processing unit
bed- of- nails
Branch Current
17. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Bitstream
AND array
DAT
bed- of- nails
18. An array of AND gates consisting of a matrix of programmable interconnection
AND array
Bus contention
Attenuation
CLB (Configurable Logic Block)
19. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Attenuation
Baseline
DRAM
Closed circuit
20. American National Standards Institute
AND
Augend
ALU
ANSI
21. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Autotransformer
Combinational logic
ALU
Boundary scan
22. The time from the application of a valid memory address to the appearance of valid output data
TTL
Access time
Complement
Battery
23. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Associative law
Compiler
AND
Dividend
24. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
CPLD
BIOS
Counter
Carry propagation
25. A series of bits describing a final design that is sent to the target device during programming
Bleeder Current
Bitstream
Decode
Ampere- hour(Ah) rating
26. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Atomic number
Charge
Data Sheet
Combinational logic
27. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Average value
DIMM
ALU
Capacitance
28. Consisting of numerals - letters - and other characters
Alphanumeric
Bus contention
Balanced Load
Balanced Bridge
29. Dual in - line memory module
DIMM
Astable
Bus arbitration
Compiler
30. A digital counter having ten states
Address Bus
Average value
Decade Counter
DCE
31. A unit of the cross - sectional area of a wire.
Boolean expression
Circular Mil (CM)
Ampere
Circuit
32. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Bistable
Ammeter
Amplitude
Binary coded decimal
33. Having two stable states. Flip- flops and latches are bistable multivibrators.
Delta Modulation
Bidirectional shift Register
Bistable
Compiler
34. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Debug
Bleeder Current
Bit time
Dynamic Memory
35. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
DAT
ALU
Combinational logic
Commutative Law
36. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Charge
Vx=(Vs * Rx) /RT
Circuit
Bit time
37. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Carry propagation
Control Unit
Decrement
Architecture
38. The ability of a capacitor to store electrical charge.
Capacitance
BJT
Bus interface unit
Buffer
39. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Bitstream
Addend
Aliasing
Central processing unit
40. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Clock
Access time
BEDO DRAM
Bandwidth
41. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Commutative Law
Band- stop filter
Analog
Code
42. A circuit that prevents loading of an input or output
Astable
Buffer
Binary
DRAM
43. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
AWG
Bus
Decode
Boolean multiplication
44. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Address Bus
Compiler
Antifuse
CMOS Complementary Metal Oxide Semiconductor
45. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Amplitude
BIOS
Norton's Theorem
Charge- coupled device
46. American wire gauge; a standardization based on wire diameter
AWG
Binary coded decimal
Boolean addition
Data Sheet
47. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Data Selector
Adder
AND
Associative law
48. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Bus
Combinational logic
Decode
Demultiplexer
49. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Adjacency
Carry
CMOS Complementary Metal Oxide Semiconductor
Dependency notation
50. In addition - the number that is added to another number called the augend
Addend
Base
Circuit Breaker
Dividend