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Test your basic knowledge |
Digital Fundamentals
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Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
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.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A connection at the midpoint of a winding in a transformer
Center Tap
Access time
Commutative Law
Counter
2. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Dynamic Memory
BJT
Band- pass filter
Bus arbitration
3. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Dynamic Memory
Capacitor
Bus arbitration
BJT
4. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Access time
CMOS
Associative law
Amplitude
5. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Capacitance
DIMM
Central processing unit
Atomic number
6. In Boolean algebra - the OR operation
Duty cycle
Augend
Bode Plot
Boolean addition
7. The action of a circuit in which it accepts current into its output from a load
Bidirectional shift Register
Duty cycle
Current sinking
ALU
8. Sum of all the voltage drops in series equals to the source voltage
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9. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Commutative Law
Data Selector
Bus interface unit
Dependency notation
10. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Balanced Load
Angular Velocity
Don't Care...
Address Bus
11. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Binary coded decimal
Comparator
Data bus
Dividend
12. A condition where all the load currents are equal and the neutral current is zero
Balanced Load
CMOS Complementary Metal Oxide Semiconductor
Norton's Theorem
Commutative Law
13. The unit of electrical current
Charge
Ampere- hour(Ah) rating
Ampere
Circuit Breaker
14. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Digital linear tape
Ampere- hour(Ah) rating
Demultiplexer
Bus contention
15. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Component
Baseline
Control Unit
Circuit Breaker
16. In addition - the number to which the addend is added
Delta Modulation
Augend
DTE
TTL
17. A method of analog- to- digital conversion using a 1- bit quantization process
CMOS Complementary Metal Oxide Semiconductor
DTE
DIMM
Delta Modulation
18. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Bitstream
Circular Mil (CM)
Ampere- hour(Ah) rating
Duty cycle
19. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
BIOS
ASCII
Data bus
Controller
20. The process of converting an analog signal to digital form
Analog- to- digital (A/D) conversion
Dependency notation
Data bus
ABEL(Advance Boolean Expression Language)
21. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
Design flow
Balanced Load
Associative law
22. A transformer in which the primary and secondary are in a single winding
Decade Counter
BIOS
Autotransformer
Balanced Load
23. Data Communications equipment
Boolean expression
Carry generation
Combinational logic
DCE
24. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Bistable
AND
Architecture
Binary coded decimal
25. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Base address
Bias
Counter
Architecture
26. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Debug
Boolean expression
AND gate
ALU
27. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Current sinking
Boundary scan
Angular Velocity
Asynchronous counter
28. A set of interconnections that interface one or more devices based on a standardized specification
Demultiplexer
Bus
Antifuse
Apparent power
29. The ratio of pulse width to period expressed as a percentage
Carry generation
Duty cycle
Amplitude
Boolean addition
30. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
DAT
Antifuse
ALU
Analog- to- digital converter(ADC)
31. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Addend
Thevenin Equivalent Circuit
Apparent power
Data Sheet
32. The digit generated when the sum of two binary digits exceeds 1
Carry
Cache memory
Clock
Astable
33. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
ALU
Delta Modulation
Capacity
Control Bus
34. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Dual in - line package
Component
Analog
Collector
35. The number of protons in a nucleus
ABEL(Advance Boolean Expression Language)
Assembly language
Atomic number
bed- of- nails
36. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Average value
Decade
Bit time
Complement
37. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Architecture
Acceptor
Autotransformer
Combinational logic
38. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Don't Care...
CMOS Complementary Metal Oxide Semiconductor
Address
D Flip-Flop
39. In addition - the number that is added to another number called the augend
Aliasing
Addend
Component
Don't Care...
40. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Concurrency
Bandwidth
Collector
Apparent power
41. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Asynchronous counter
Dividend
CMOS
Cascade
42. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Addend
Cascade
Cache memory
Aliasing
43. In a division operation the quantity that is being divided
Bandwidth
Decoder
Vx=(Vs * Rx) /RT
Dividend
44. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
BIOS
Base address
Ammeter
Decode
45. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Branch
Data bus
Diode
Central processing unit
46. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Carry propagation
Dynamic Memory
Band- stop filter
Astable
47. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
DAT
Decode
Thevenin Equivalent Circuit
Analog- to- digital converter(ADC)
48. Having two opposites charge carriers within the transistor structure
Bipolar
Bistable
DMA
Complement
49. A circuit that prevents loading of an input or output
Comparator
Vx=(Vs * Rx) /RT
Battery
Buffer
50. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Decimal
Thevenin Equivalent Circuit
Collector
AND
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