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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
Ampere- hour(Ah) rating
Autotransformer
Diode
2. In Boolean algebra - the OR operation
Asynchronous counter
Atom
Complement
Boolean addition
3. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Decoder
Apparent power
bed- of- nails
Aliasing
4. A resettable protective device used for interrupting execessive current in an electric circuit
Central processing unit
Associative law
Circuit Breaker
Clock
5. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Thevenin Equivalent Circuit
Debug
TTL
Amplitude
6. Data Terminal equipment
Decade
Alphanumeric
DTE
Duty cycle
7. A method of analog- to- digital conversion using a 1- bit quantization process
Don't Care...
CLB (Configurable Logic Block)
Adder
Delta Modulation
8. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
9. A programming language that uses English like words and has a one- to- one correspondence to machine language
Decrement
Assembly language
Component
DMA
10. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Capacitance Reactance
Circuit
Dynamic Memory
Carry
11. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Data
Buffer
DMA
Bus contention
12. The mathematics of logic circuits
ALU
DRAM
CLB (Configurable Logic Block)
Boolean algebra
13. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Bus interface unit
Addend
Distributive Law
Decimal
14. American wire gauge; a standardization based on wire diameter
Band- stop filter
D Flip-Flop
AWG
Circuit
15. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Binary
Bidirectional shift Register
TTL
Complement
16. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Address
Controller
Address Bus
Byte
17. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Counter
Dynamic Memory
Bandwidth
Average value
18. The process of converting an analog signal to digital form
Analog- to- digital (A/D) conversion
DIMM
bed- of- nails
ANSI
19. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Compiler
Data Selector
Array
Charge
20. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Boolean multiplication
Boolean expression
Dual in - line package
Carry propagation
21. Consisting of numerals - letters - and other characters
Kirchoff's Voltage Law
Alphanumeric
Capacitance Reactance
Ampere
22. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Bias
Boolean multiplication
Apparent power
Central processing unit
23. A series of bits describing a final design that is sent to the target device during programming
Bitstream
Asynchronous counter
CPLD
Bistable
24. In a division operation the quantity that is being divided
Addend
DTE
Dividend
DAT
25. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Combinational logic
Adder
Alphanumeric
D Flip-Flop
26. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Kirchoff's Voltage Law
Don't Care...
Central processing unit
Dependency notation
27. The smallest particle of an element possessing the unique characteristics of that element.
Adder
Cache memory
Atom
Admittance
28. The current left after the total load current is subtracted from the total current into the circuit
ANSI
Atomic number
Concurrency
Bleeder Current
29. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Carry
Band- stop filter
DRAM
Circuit
30. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
AHDL
Control Unit
Acceptor
Control Bus
31. A digital counter having ten states
Decade Counter
Buffer
Analog- to- digital (A/D) conversion
Array
32. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Bandwidth
Component
Carry
Duty cycle
33. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
34. American National Standards Institute
ANSI
Amplitude
Decode
Cross - assembler
35. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Counter
Baseline
Cascade
Access time
36. Describes a number system with a base of ten
Amplitude
Bias
Binary coded decimal
Decimal
37. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Average value
Bus contention
DIMM
Boundary scan
38. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Angular Velocity
Circuit
bed- of- nails
Boundary scan
39. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Bandwidth
CMOS
Data Selector
Capacity
40. A logic gate that produces a High output only when all of the inputs are HIGH
CMOS Complementary Metal Oxide Semiconductor
AND gate
Clock
Clear
41. The time from the application of a valid memory address to the appearance of valid output data
CMOS
Concurrency
Data
Access time
42. Digital audio tape; a type of magnetic tape format
Diode
AHDL
Bit time
DAT
43. Characterized by ten states or values
Decade
Center Tap
Bitstream
Cascade
44. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Boundary scan
Access time
bed- of- nails
Base
45. The ratio of pulse width to period expressed as a percentage
Diode
Duty cycle
Don't Care...
CMOS
46. In addition - the number that is added to another number called the augend
Data Selector
Bus
Addend
Base
47. A combined coder and decoder
Data Selector
Code
Boolean multiplication
Choke
48. Information in numeric - alphabetic - or other form.
Boolean expression
Capacity
Band- pass filter
Data
49. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Code
Boolean expression
Data Sheet
Amplitude
50. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Kirchoff's Current Law(KCL)
Antifuse
Boolean multiplication
Dividend