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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
BEDO DRAM
Autotransformer
Compiler
Clock
2. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Bit time
Carry
Capacitance Reactance
Cross - assembler
3. The current left after the total load current is subtracted from the total current into the circuit
Address Bus
Controller
Autotransformer
Bleeder Current
4. A type of inductor used to block or choke off high frequencies
Carry propagation
CLB (Configurable Logic Block)
Choke
Binary
5. In a division operation the quantity that is being divided
BJT
AWG
TTL
Dividend
6. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Cross - assembler
Average value
Amplitude
TTL
7. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
AND
Controller
Array
Digital linear tape
8. Information in numeric - alphabetic - or other form.
Balanced Bridge
Battery
Data
Addend
9. Describes a number system with a base of ten
Baseline
Buffer
Decimal
BEDO DRAM
10. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Decoder
Cascade
Distributive Law
Carry propagation
11. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Baseline
Charge
Circuit
CMOS
12. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Boolean algebra
DRAM
Circuit
Bode Plot
13. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Bandwidth
Cascade
Capacity
Thevenin Equivalent Circuit
14. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Cache memory
Address
BIOS
Analog- to- digital (A/D) conversion
15. A logic gate that produces a High output only when all of the inputs are HIGH
Band- pass filter
AND gate
ANSI
Angular Velocity
16. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Average value
Analog- to- digital (A/D) conversion
Demultiplexer
Admittance
17. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
CMOS
Bus interface unit
Analog- to- digital (A/D) conversion
Closed circuit
18. A combined coder and decoder
Data Selector
Code
Bitstream
Charge- coupled device
19. The process that prevents two sources from using a bus at the same time
Boolean algebra
Acceptor
Bus arbitration
BIOS
20. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Amplitude
Center Tap
Vx=(Vs * Rx) /RT
Bus interface unit
21. The time from the application of a valid memory address to the appearance of valid output data
DSP
Access time
Bandwidth
Branch
22. Dual in - line memory module
TTL
Norton's Theorem
Digital linear tape
DIMM
23. A receiving device on a bus
Vx=(Vs * Rx) /RT
Boolean algebra
Acceptor
Code
24. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
Combinational logic
Dynamic Memory
Baseline
CPLD
25. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Controller
Boundary scan
Analog- to- digital converter(ADC)
Capacitance
26. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Analog- to- digital (A/D) conversion
Bus interface unit
Analog
Boolean expression
27. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
bed- of- nails
Decrement
Cascade
Acceptor
28. A binary digit - which can be either 1 or 0
Bit
Bode Plot
Vx=(Vs * Rx) /RT
Capacitor
29. A programming language that uses English like words and has a one- to- one correspondence to machine language
Charge- coupled device
Bus arbitration
Astable
Assembly language
30. Having two stable states. Flip- flops and latches are bistable multivibrators.
Counter
Bistable
CMOS
Buffer
31. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Aliasing
Bias
Capacitance Reactance
Circular Mil (CM)
32. In addition - the number that is added to another number called the augend
Current sinking
DCE
Don't Care...
Addend
33. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Atomic number
Bidirectional shift Register
Admittance
Base
34. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Battery
Adder
Dividend
Decode
35. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Battery
Atomic number
Atom
Bode Plot
36. An electrical instrument used to measure current
Bus contention
Boolean algebra
Ammeter
ALU
37. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Baseline
Access time
Boundary scan
Binary coded decimal
38. A group of eight bits
Charge
Byte
Binary coded decimal
Capacity
39. The ability of a capacitor to store electrical charge.
Combinational logic
Bias
Analog
Capacitance
40. A set of interconnections that interface one or more devices based on a standardized specification
Cross - assembler
Duty cycle
Bus
Comparator
41. The mathematics of logic circuits
Cache memory
Boolean algebra
Vx=(Vs * Rx) /RT
Amplitude
42. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Code
Astable
Balanced Bridge
Capacitance
43. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Component
Data Selector
DAT
Collector
44. The process or sequence of operations carried out to program a target device
Circuit
Digital linear tape
Addend
Design flow
45. American wire gauge; a standardization based on wire diameter
AWG
Kirchoff's Current Law(KCL)
DMA
Asynchronous counter
46. The smallest particle of an element possessing the unique characteristics of that element.
Bus contention
Atom
Capacitance
Bias
47. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
DMA
Charge
Decode
Bleeder Current
48. In Boolean algebra - the OR operation
Boolean addition
Decrement
Decade
Autotransformer
49. A series of bits describing a final design that is sent to the target device during programming
Asynchronous counter
Closed circuit
Bitstream
Bias
50. An expression of variables and operators used to express the operation of a logic circuit
Current sinking
Boolean expression
bed- of- nails
AHDL