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Digital Fundamentals

Subject : engineering
Instructions:
  • Answer 50 questions in 15 minutes.
  • If you are not ready to take this test, you can study here.
  • Match each statement with the correct term.
  • Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.

This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An electrical instrument used to measure current






2. Information in numeric - alphabetic - or other form.






3. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.






4. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor






5. Having two stable states. Flip- flops and latches are bistable multivibrators.






6. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic






7. One of the three regions in a bipolar junction transistor






8. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence






9. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor






10. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.






11. Altera HDL; a nonstandard HDL






12. A connection at the midpoint of a winding in a transformer






13. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs






14. A software compiler language for SPLD programming; a type of hardware description language (HDL)






15. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.






16. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously






17. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.






18. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte






19. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent






20. In addition - the number to which the addend is added






21. Data Communications equipment






22. Sum of all currents entering a node is equal to the sum of all currents leaving the same node

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23. One current path in a parallel circuit; a current path that connects two nodes






24. A type of magnetic tape format






25. American Standard Code for Information Interchange; the most widely used alphanumeric code.






26. A combined coder and decoder






27. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.






28. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities






29. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.






30. The process of converting an analog signal to digital form






31. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions






32. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.






33. Data Terminal equipment






34. A circuit that prevents loading of an input or output






35. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB






36. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference






37. Having two opposites charge carriers within the transistor structure






38. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device






39. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.






40. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function






41. A transformer in which the primary and secondary are in a single winding






42. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides






43. Having two directions. the stored data can be shifted right or left






44. The interval of time occupied by a single bit in a sequence of bits; the period of the clock






45. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.






46. The process that prevents two sources from using a bus at the same time






47. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.






48. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.






49. One of the three regions in a bipolar Junction transistor(North junction of NpN)






50. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.