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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The process of converting an analog signal to digital form
Analog- to- digital (A/D) conversion
Bus interface unit
Debug
Component
2. Describes a number system with a base of ten
Decimal
BEDO DRAM
Antifuse
Charge- coupled device
3. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Atom
Byte
Decode
Demultiplexer
4. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Admittance
Norton's Theorem
Capacitance Reactance
Address
5. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Associative law
bed- of- nails
Admittance
Digital linear tape
6. Having two directions. the stored data can be shifted right or left
Bus interface unit
Aliasing
Bidirectional shift Register
Band- stop filter
7. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Data bus
Carry propagation
AHDL
ABEL(Advance Boolean Expression Language)
8. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Boundary scan
Base
Capacitor
ALU
9. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Component
Carry propagation
Charge- coupled device
Bus interface unit
10. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Address Bus
Apparent power
Baseline
Amplitude
11. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Bidirectional shift Register
CLB (Configurable Logic Block)
Data Sheet
Circular Mil (CM)
12. Having two stable states. Flip- flops and latches are bistable multivibrators.
BEDO DRAM
D Flip-Flop
Bistable
Decrement
13. A unit of the cross - sectional area of a wire.
Amplitude
Asynchronous counter
Bit time
Circular Mil (CM)
14. A digital circuit device that converts coded information into another (familiar) or noncoded form
BJT
Access time
Diode
Decoder
15. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Adder
Bit time
Astable
D Flip-Flop
16. American National Standards Institute
Base address
Amplitude
ANSI
Duty cycle
17. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
DMA
Addend
AWG
Bus
18. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Current sinking
Cascade
Ampere- hour(Ah) rating
Control Unit
19. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
ABEL(Advance Boolean Expression Language)
BIOS
Central processing unit
Bode Plot
20. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Admittance
Binary coded decimal
Addend
Charge
21. A type of inductor used to block or choke off high frequencies
Asynchronous counter
Choke
Augend
Combinational logic
22. A method of analog- to- digital conversion using a 1- bit quantization process
bed- of- nails
Capacity
Delta Modulation
Boundary scan
23. In addition - the number that is added to another number called the augend
DAT
Commutative Law
Addend
Adder
24. A series of bits describing a final design that is sent to the target device during programming
Band- stop filter
Bitstream
Balanced Load
AND
25. The current left after the total load current is subtracted from the total current into the circuit
Choke
Binary coded decimal
Bleeder Current
AND gate
26. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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27. A group of eight bits
Dependency notation
Analog
Byte
CMOS Complementary Metal Oxide Semiconductor
28. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Dependency notation
Adjacency
Access time
Current sinking
29. An electrical instrument used to measure current
BEDO DRAM
Ammeter
Binary coded decimal
Adjacency
30. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Apparent power
Diode
Asynchronous counter
Atom
31. A type of IC package whose leads must pass through holes to the other side of a PC board
Dual in - line package
Ammeter
Array
Control Bus
32. The actual current in a branch
Branch Current
Distributive Law
Ampere
Bus contention
33. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Capacitor
Dual in - line package
Bus arbitration
Comparator
34. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Bode Plot
Capacitance
Dynamic Memory
Boolean addition
35. The number of protons in a nucleus
Controller
Carry propagation
Atomic number
Amplitude
36. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Array
Circuit Breaker
Capacitance
Buffer
37. To decrease the binary state of a counter by one
Bandwidth
Decrement
Current sinking
Capacity
38. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Distributive Law
DTE
Bus contention
Boolean expression
39. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Architecture
Decoder
Astable
Autotransformer
40. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Circuit
Boolean expression
Carry generation
Delta Modulation
41. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Bitstream
Capacitance Reactance
Bus contention
Average value
42. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Bus
Baseline
DMA
Dependency notation
43. Having two opposites charge carriers within the transistor structure
ALU
Boolean expression
Complement
Bipolar
44. Dual in - line memory module
DIMM
Distributive Law
Demultiplexer
Boolean expression
45. The digit generated when the sum of two binary digits exceeds 1
Duty cycle
BIOS
Carry
Architecture
46. A connection at the midpoint of a winding in a transformer
Ammeter
Cascade
Center Tap
Associative law
47. Data Terminal equipment
Comparator
DTE
Architecture
Augend
48. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Ampere- hour(Ah) rating
Comparator
Circuit
Code
49. American wire gauge; a standardization based on wire diameter
AWG
Counter
Array
Addend
50. The time from the application of a valid memory address to the appearance of valid output data
Digital linear tape
Central processing unit
CMOS Complementary Metal Oxide Semiconductor
Access time