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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Altera HDL; a nonstandard HDL
Adder
Data bus
Concurrency
AHDL
2. A condition where all the load currents are equal and the neutral current is zero
Addend
Binary
Carry generation
Balanced Load
3. The ratio of pulse width to period expressed as a percentage
Decoder
Duty cycle
Control Bus
Amplitude
4. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
BJT
Address
Band- stop filter
Thevenin Equivalent Circuit
5. Burst extended data output dynamic random- access memory
Boolean multiplication
Augend
Capacitor
BEDO DRAM
6. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Controller
Closed circuit
Carry propagation
CMOS Complementary Metal Oxide Semiconductor
7. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Don't Care...
Angular Velocity
Alphanumeric
Closed circuit
8. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
Circuit Breaker
Base
Kirchoff's Current Law(KCL)
BJT
9. A combined coder and decoder
Control Unit
Binary coded decimal
Debug
Code
10. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Concurrency
Bleeder Current
Battery
Control Bus
11. American wire gauge; a standardization based on wire diameter
Duty cycle
AWG
Attenuation
DMA
12. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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13. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Debug
Address Bus
Digital linear tape
Clock
14. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Comparator
Bus interface unit
DSP
Capacitance
15. The current left after the total load current is subtracted from the total current into the circuit
Bleeder Current
Charge- coupled device
DIMM
AWG
16. A method of analog- to- digital conversion using a 1- bit quantization process
Delta Modulation
Amplitude
Central processing unit
Branch
17. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
AWG
Charge- coupled device
Capacitor
ABEL(Advance Boolean Expression Language)
18. A type of magnetic tape format
bed- of- nails
BJT
Digital linear tape
Aliasing
19. In addition - the number that is added to another number called the augend
Addend
Digital linear tape
Decoder
Base address
20. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Alphanumeric
Data Sheet
Commutative Law
Bidirectional shift Register
21. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
DCE
DRAM
Address Bus
Architecture
22. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Assembly language
Decade Counter
Data Sheet
Capacitance
23. The ability of a capacitor to store electrical charge.
Capacitance
Data Selector
AND
Admittance
24. Digital audio tape; a type of magnetic tape format
DAT
Augend
CMOS Complementary Metal Oxide Semiconductor
Balanced Load
25. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CLB (Configurable Logic Block)
Array
Demultiplexer
Complement
26. The mathematics of logic circuits
Address
Norton's Theorem
Bipolar
Boolean algebra
27. The number of protons in a nucleus
Dividend
Don't Care...
Atomic number
Adder
28. A receiving device on a bus
Acceptor
Capacitor
Byte
Amplitude
29. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Data Selector
Astable
Boolean addition
Norton's Theorem
30. Characterized by ten states or values
Digital linear tape
Decade
Bus arbitration
Carry
31. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Thevenin Equivalent Circuit
Dependency notation
CMOS
Analog
32. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
D Flip-Flop
Clear
Bode Plot
CLB (Configurable Logic Block)
33. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Bleeder Current
BEDO DRAM
Autotransformer
ASCII
34. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Autotransformer
Controller
Complement
Dynamic Memory
35. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Closed circuit
Amplitude
Associative law
Clock
36. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Atom
DRAM
Bidirectional shift Register
Address Bus
37. Data Terminal equipment
Data bus
DTE
Bus contention
Ampere- hour(Ah) rating
38. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Balanced Load
AND
DIMM
Charge- coupled device
39. A device used to convert an analog signal to a sequence of digital codes
AND gate
Bus arbitration
Capacitor
Analog- to- digital converter(ADC)
40. Transistor-Transistor Logic and is implemented with bipolar junction transistors
TTL
AND gate
Decode
Kirchoff's Voltage Law
41. An expression of variables and operators used to express the operation of a logic circuit
Data Sheet
Decimal
Boolean expression
Dependency notation
42. Data Communications equipment
DMA
Bipolar
Bus contention
DCE
43. The process or sequence of operations carried out to program a target device
Dual in - line package
Design flow
Commutative Law
Bitstream
44. A class of integrated logic circuits that is implemented with a type of field effect transistor
CMOS Complementary Metal Oxide Semiconductor
Commutative Law
Capacity
Cascade
45. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
bed- of- nails
Distributive Law
Acceptor
Capacitance Reactance
46. A digital circuit device that converts coded information into another (familiar) or noncoded form
Complement
ASCII
Kirchoff's Voltage Law
Decoder
47. A set of interconnections that interface one or more devices based on a standardized specification
CLB (Configurable Logic Block)
Bus
Control Unit
Augend
48. A type of IC package whose leads must pass through holes to the other side of a PC board
Dual in - line package
Address
Clear
Autotransformer
49. One of the three regions in a bipolar junction transistor
BEDO DRAM
Base
Baseline
CLB (Configurable Logic Block)
50. The smallest particle of an element possessing the unique characteristics of that element.
Astable
Base
Dual in - line package
Atom