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Test your basic knowledge |
Digital Fundamentals
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Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Amplitude
Bias
ALU
Design flow
2. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Dynamic Memory
Circuit
bed- of- nails
Access time
3. The digit generated when the sum of two binary digits exceeds 1
Carry
Data bus
AND array
Dynamic Memory
4. The mathematics of logic circuits
Boolean algebra
Associative law
Clear
Compiler
5. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
CLB (Configurable Logic Block)
Byte
BJT
Clock
6. An array of AND gates consisting of a matrix of programmable interconnection
Control Unit
Collector
AND array
Asynchronous counter
7. Characterized by ten states or values
DAT
AHDL
Decade
Capacitor
8. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Controller
Assembly language
Data
BIOS
9. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Array
Decimal
Capacitance
Bandwidth
10. Describes a number system with a base of ten
Center Tap
Decimal
AND array
Average value
11. Sum of all the voltage drops in series equals to the source voltage
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12. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Apparent power
Bus
Address Bus
Carry
13. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
bed- of- nails
Diode
Carry propagation
Counter
14. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Amplitude
Cross - assembler
Analog
Central processing unit
15. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Analog- to- digital (A/D) conversion
Concurrency
Base address
Cascade
16. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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17. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Apparent power
Byte
CLB (Configurable Logic Block)
DMA
18. Having two directions. the stored data can be shifted right or left
Bidirectional shift Register
Duty cycle
Angular Velocity
AND array
19. Having two opposites charge carriers within the transistor structure
Bipolar
Assembly language
Array
Compiler
20. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Base
Access time
Astable
Cross - assembler
21. Consisting of numerals - letters - and other characters
Center Tap
Buffer
Alphanumeric
ANSI
22. A method of analog- to- digital conversion using a 1- bit quantization process
Assembly language
Diode
Ammeter
Delta Modulation
23. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Balanced Bridge
Boolean addition
Adder
Battery
24. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Data Selector
Compiler
Bias
TTL
25. The ratio of pulse width to period expressed as a percentage
Decimal
Duty cycle
Cascade
Asynchronous counter
26. A program that converts English- like mnemonics into machine code
CMOS Complementary Metal Oxide Semiconductor
Assembler
Capacitance Reactance
Attenuation
27. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Bidirectional shift Register
Controller
Ampere
D Flip-Flop
28. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Alphanumeric
Bus contention
Ampere- hour(Ah) rating
Charge
29. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Base address
AWG
Bipolar
Comparator
30. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Decode
Dependency notation
Capacitor
Asynchronous counter
31. A transformer in which the primary and secondary are in a single winding
Asynchronous counter
Autotransformer
AND gate
Bus contention
32. The process of producing an output carry in full- adder when both input bits are 1s.
Center Tap
Current sinking
Bus arbitration
Carry generation
33. The process that prevents two sources from using a bus at the same time
Clear
Digital linear tape
Bus arbitration
Diode
34. In addition - the number to which the addend is added
Cascade
Augend
Compiler
Kirchoff's Current Law(KCL)
35. A series of bits describing a final design that is sent to the target device during programming
Baseline
Address
Central processing unit
Bitstream
36. A digital counter having ten states
Decade Counter
Circuit
Autotransformer
Dividend
37. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
DRAM
Dividend
CMOS Complementary Metal Oxide Semiconductor
Concurrency
38. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
Kirchoff's Current Law(KCL)
Analog- to- digital (A/D) conversion
Data bus
39. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Byte
Clock
Decode
Commutative Law
40. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Cross - assembler
Bleeder Current
Carry propagation
Aliasing
41. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Decrement
Complement
Boolean multiplication
Bus arbitration
42. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Addend
Band- stop filter
Ammeter
ALU
43. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Control Bus
Adjacency
Duty cycle
bed- of- nails
44. The number of protons in a nucleus
Atomic number
Decode
Dynamic Memory
Angular Velocity
45. American National Standards Institute
Amplitude
Amplitude
CPLD
ANSI
46. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
AND
Bidirectional shift Register
Bit time
ABEL(Advance Boolean Expression Language)
47. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
D Flip-Flop
CLB (Configurable Logic Block)
Bode Plot
Ammeter
48. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Thevenin Equivalent Circuit
Boundary scan
Associative law
Norton's Theorem
49. An expression of variables and operators used to express the operation of a logic circuit
DTE
Bus contention
Data Selector
Boolean expression
50. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Circuit Breaker
Binary coded decimal
Balanced Load
Kirchoff's Current Law(KCL)
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