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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Assembler
Charge- coupled device
Cascade
Addend
2. American Standard Code for Information Interchange; the most widely used alphanumeric code.
ASCII
AND gate
Bus arbitration
Adder
3. To decrease the binary state of a counter by one
Decrement
Decade
Balanced Bridge
D Flip-Flop
4. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CLB (Configurable Logic Block)
Distributive Law
Bit
Boolean multiplication
5. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Attenuation
DMA
Bit time
Combinational logic
6. The process that prevents two sources from using a bus at the same time
Band- stop filter
Capacitance
Admittance
Bus arbitration
7. An array of AND gates consisting of a matrix of programmable interconnection
AND array
Boolean addition
AND gate
Branch
8. In Boolean algebra - the AND operation
Circular Mil (CM)
Demultiplexer
CMOS Complementary Metal Oxide Semiconductor
Boolean multiplication
9. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Boolean addition
Capacitor
AHDL
Branch
10. A circuit with a complete current path
AHDL
Digital linear tape
Band- pass filter
Closed circuit
11. A semiconductor device that conducts current in only one direction
Diode
Charge- coupled device
Ampere- hour(Ah) rating
Choke
12. A type of IC package whose leads must pass through holes to the other side of a PC board
Dual in - line package
Collector
Decade
Architecture
13. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Combinational logic
Balanced Bridge
BEDO DRAM
Cross - assembler
14. Describes a number system with a base of ten
Circuit
Decimal
Acceptor
Kirchoff's Voltage Law
15. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Atomic number
Current sinking
Component
Data
16. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Bipolar
bed- of- nails
Digital linear tape
Data bus
17. A receiving device on a bus
Demultiplexer
Carry generation
Apparent power
Acceptor
18. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Bus interface unit
Aliasing
Carry propagation
Balanced Bridge
19. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
ALU
Baseline
Angular Velocity
Buffer
20. The action of a circuit in which it accepts current into its output from a load
Current sinking
Aliasing
D Flip-Flop
BIOS
21. The maximum value of a voltage or current
Assembly language
BEDO DRAM
Dividend
Amplitude
22. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
23. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Data Sheet
Design flow
Bit time
AWG
24. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Buffer
Boundary scan
Circular Mil (CM)
Boolean algebra
25. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Atom
Associative law
Design flow
Carry propagation
26. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Array
Carry generation
AND
Binary coded decimal
27. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
DSP
ANSI
Complement
Controller
28. A combined coder and decoder
Asynchronous counter
Amplitude
Code
Acceptor
29. A connection at the midpoint of a winding in a transformer
Kirchoff's Current Law(KCL)
Data Selector
Center Tap
Bode Plot
30. Digital Signal Processor; a special type of microprocessor that processes data in real time
Bias
DSP
Boolean algebra
Band- stop filter
31. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Data bus
Distributive Law
Thevenin Equivalent Circuit
Collector
32. Having two directions. the stored data can be shifted right or left
Code
Bidirectional shift Register
Bode Plot
Dividend
33. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Boundary scan
BIOS
Ampere- hour(Ah) rating
AND gate
34. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Decimal
Alphanumeric
Baseline
AWG
35. Having two stable states. Flip- flops and latches are bistable multivibrators.
Center Tap
Carry propagation
Bus arbitration
Bistable
36. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Average value
Decrement
Address Bus
Bitstream
37. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
ABEL(Advance Boolean Expression Language)
Bistable
D Flip-Flop
Control Unit
38. The current left after the total load current is subtracted from the total current into the circuit
Carry
Address Bus
Bias
Bleeder Current
39. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Decode
Decoder
Boundary scan
ABEL(Advance Boolean Expression Language)
40. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Balanced Bridge
Boolean multiplication
Charge- coupled device
Amplitude
41. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Circuit
Controller
Data Sheet
Capacity
42. American National Standards Institute
Astable
DMA
Circular Mil (CM)
ANSI
43. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Vx=(Vs * Rx) /RT
D Flip-Flop
Architecture
Decode
44. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Code
Analog
Associative law
Asynchronous counter
45. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
ALU
Clock
CMOS
Asynchronous counter
46. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Clear
Apparent power
Decade Counter
Bit time
47. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Central processing unit
Atom
Address
CLB (Configurable Logic Block)
48. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Capacitance
Compiler
Baseline
Adjacency
49. In addition - the number to which the addend is added
Thevenin Equivalent Circuit
Band- stop filter
Augend
Data
50. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Decode
Base address
ALU
Bus contention