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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Boolean expression
Circuit
Decade Counter
Thevenin Equivalent Circuit
2. The maximum value of a voltage or current
Balanced Load
Amplitude
Atomic number
Counter
3. A logic circuit used to add two binary numbers
Code
Adder
Decoder
Byte
4. Digital Signal Processor; a special type of microprocessor that processes data in real time
CMOS
Decade Counter
Choke
DSP
5. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Circuit
TTL
Binary coded decimal
Acceptor
6. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Data bus
Dependency notation
Delta Modulation
Binary
7. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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8. The unit of electrical current
Center Tap
Data Sheet
Baseline
Ampere
9. A method of analog- to- digital conversion using a 1- bit quantization process
Cache memory
Delta Modulation
Binary coded decimal
Adder
10. A circuit that prevents loading of an input or output
Combinational logic
DTE
Buffer
DRAM
11. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Carry generation
Address
DCE
Analog
12. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Bus contention
Kirchoff's Voltage Law
Architecture
Astable
13. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Adjacency
Dependency notation
AND array
Admittance
14. One current path in a parallel circuit; a current path that connects two nodes
AWG
Central processing unit
Branch
Average value
15. A unit of the cross - sectional area of a wire.
Closed circuit
Circular Mil (CM)
Cache memory
Thevenin Equivalent Circuit
16. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Ampere- hour(Ah) rating
Bit
DSP
Central processing unit
17. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Analog- to- digital converter(ADC)
Cascade
Center Tap
Aliasing
18. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Band- pass filter
Adjacency
Carry propagation
DCE
19. The current left after the total load current is subtracted from the total current into the circuit
Bleeder Current
CPLD
Ammeter
Bidirectional shift Register
20. Sum of all the voltage drops in series equals to the source voltage
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21. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Adder
Address Bus
Bias
ASCII
22. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Current sinking
Demultiplexer
Circuit
D Flip-Flop
23. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Charge
Compiler
Closed circuit
Combinational logic
24. A logic gate that produces a High output only when all of the inputs are HIGH
CMOS
AND gate
Buffer
Access time
25. A type of counter in which each stage is clocked from the output of the preceding stage.
Charge
Dynamic Memory
Asynchronous counter
Current sinking
26. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
Bus arbitration
bed- of- nails
Dividend
CPLD
27. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Associative law
Baseline
Boolean addition
Apparent power
28. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Bistable
Analog
Bitstream
Data Selector
29. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Comparator
Clear
Boundary scan
Byte
30. The process that prevents two sources from using a bus at the same time
Debug
Bus arbitration
Central processing unit
DAT
31. A resettable protective device used for interrupting execessive current in an electric circuit
Carry generation
Circuit Breaker
Code
AND
32. American National Standards Institute
Architecture
Controller
ANSI
Distributive Law
33. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
Comparator
Decade
ALU
34. An electrical instrument used to measure current
DCE
Bode Plot
Access time
Ammeter
35. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Bit time
Apparent power
Alphanumeric
BIOS
36. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bus contention
Architecture
Decimal
Data Sheet
37. To decrease the binary state of a counter by one
Combinational logic
Atomic number
Decrement
Choke
38. Altera HDL; a nonstandard HDL
Diode
Charge
Component
AHDL
39. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
AWG
Cache memory
Buffer
Decimal
40. A transformer in which the primary and secondary are in a single winding
Autotransformer
Carry
Don't Care...
Acceptor
41. A set of interconnections that interface one or more devices based on a standardized specification
Norton's Theorem
Buffer
Dynamic Memory
Bus
42. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Boolean addition
Capacitor
Bus interface unit
Bistable
43. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Address Bus
Assembly language
Band- pass filter
Bit time
44. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
bed- of- nails
Binary
Clear
Average value
45. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Complement
Clock
Access time
Binary coded decimal
46. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Counter
Adjacency
Adder
47. In Boolean algebra - the OR operation
Boolean addition
DSP
Circuit
DIMM
48. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Thevenin Equivalent Circuit
Bus arbitration
Circuit
BJT
49. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Dynamic Memory
Branch
Address Bus
Charge
50. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Charge- coupled device
Demultiplexer
CLB (Configurable Logic Block)
Bode Plot