SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Decimal
Array
Base address
Bus arbitration
2. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Dependency notation
Average value
Capacitor
Debug
3. Information in numeric - alphabetic - or other form.
Byte
Combinational logic
Data
Autotransformer
4. The application of a dc voltage to an electronic device to produce a desired mode of operation
Band- stop filter
Boundary scan
Bias
Thevenin Equivalent Circuit
5. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Boundary scan
Combinational logic
Cache memory
Byte
6. A resettable protective device used for interrupting execessive current in an electric circuit
Associative law
Circuit Breaker
Bus arbitration
Balanced Bridge
7. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Associative law
Bus contention
CLB (Configurable Logic Block)
Current sinking
8. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Augend
ANSI
Comparator
Bleeder Current
9. The maximum value of a voltage or current
BEDO DRAM
TTL
Charge- coupled device
Amplitude
10. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Base
Demultiplexer
Controller
Dynamic Memory
11. The process of producing an output carry in full- adder when both input bits are 1s.
Carry generation
ALU
Bitstream
Array
12. A logic circuit used to add two binary numbers
Ammeter
Data bus
Adder
Data Selector
13. A type of counter in which each stage is clocked from the output of the preceding stage.
Asynchronous counter
Adder
Ammeter
Concurrency
14. Altera HDL; a nonstandard HDL
AHDL
Comparator
Carry propagation
ABEL(Advance Boolean Expression Language)
15. The process that prevents two sources from using a bus at the same time
Bidirectional shift Register
Bus arbitration
Cascade
CMOS Complementary Metal Oxide Semiconductor
16. A circuit with a complete current path
Closed circuit
Diode
Bias
Kirchoff's Current Law(KCL)
17. In Boolean algebra - the OR operation
Amplitude
Branch
Boolean addition
Byte
18. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Data Selector
Analog
Delta Modulation
Distributive Law
19. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
BEDO DRAM
Dynamic Memory
bed- of- nails
20. A digital circuit device that converts coded information into another (familiar) or noncoded form
Circuit Breaker
Capacitance
Data Selector
Decoder
21. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Data bus
Capacitance
Current sinking
Thevenin Equivalent Circuit
22. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Decrement
Bus
Carry propagation
Amplitude
23. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Bandwidth
Circuit
Collector
Circuit
24. One current path in a parallel circuit; a current path that connects two nodes
Adjacency
Angular Velocity
Branch
Bode Plot
25. The action of a circuit in which it accepts current into its output from a load
Boundary scan
Data Selector
Current sinking
Commutative Law
26. One of the three regions in a bipolar junction transistor
Base
Adjacency
Augend
DCE
27. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
28. A digital counter having ten states
Bit
Band- stop filter
Cross - assembler
Decade Counter
29. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Acceptor
Astable
Data Selector
Binary
30. A set of interconnections that interface one or more devices based on a standardized specification
Bus
Antifuse
Bistable
Control Unit
31. A class of integrated logic circuits that is implemented with a type of field effect transistor
DSP
Bitstream
Charge
CMOS Complementary Metal Oxide Semiconductor
32. A binary digit - which can be either 1 or 0
Choke
Architecture
Bit
Bode Plot
33. To decrease the binary state of a counter by one
Decrement
Circuit Breaker
Buffer
Ampere
34. Sum of all the voltage drops in series equals to the source voltage
35. A group of eight bits
AND gate
Analog- to- digital converter(ADC)
Byte
Base address
36. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Access time
Thevenin Equivalent Circuit
Vx=(Vs * Rx) /RT
37. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Circuit
Address Bus
Controller
Aliasing
38. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
CLB (Configurable Logic Block)
Average value
AND gate
Bipolar
39. Having two opposites charge carriers within the transistor structure
Bipolar
DAT
bed- of- nails
Data bus
40. An array of AND gates consisting of a matrix of programmable interconnection
AND array
Demultiplexer
Byte
Duty cycle
41. The mathematics of logic circuits
Vx=(Vs * Rx) /RT
Charge
Boolean expression
Boolean algebra
42. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Component
Byte
Astable
Carry generation
43. Describes a number system with a base of ten
Attenuation
Decimal
Adder
Amplitude
44. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Combinational logic
Kirchoff's Voltage Law
Antifuse
DIMM
45. Data Terminal equipment
Decoder
DTE
Capacity
Bus contention
46. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Choke
DIMM
Controller
Circuit
47. A circuit that prevents loading of an input or output
Buffer
Circular Mil (CM)
Bipolar
Duty cycle
48. The ratio of pulse width to period expressed as a percentage
Data Sheet
Duty cycle
Vx=(Vs * Rx) /RT
Capacitance
49. A receiving device on a bus
Byte
Acceptor
TTL
Control Bus
50. The number of protons in a nucleus
Decimal
Compiler
Atomic number
Circuit