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Test your basic knowledge |
Digital Fundamentals
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Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
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study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Cross - assembler
DCE
Bus interface unit
Bias
2. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
AND
Control Unit
AND gate
Kirchoff's Voltage Law
3. The time from the application of a valid memory address to the appearance of valid output data
Access time
Demultiplexer
Norton's Theorem
Comparator
4. A semiconductor device that conducts current in only one direction
Carry
Choke
AND
Diode
5. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Astable
Control Bus
DRAM
Binary
6. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Amplitude
Dual in - line package
Balanced Load
Decimal
7. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Code
Bode Plot
Choke
Control Unit
8. In a division operation the quantity that is being divided
Dividend
Bidirectional shift Register
AHDL
Cross - assembler
9. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Acceptor
Control Bus
Central processing unit
Commutative Law
10. A resettable protective device used for interrupting execessive current in an electric circuit
Circuit Breaker
Analog
Collector
Dependency notation
11. Data Terminal equipment
ANSI
CPLD
DTE
DSP
12. A receiving device on a bus
Cross - assembler
Acceptor
Decrement
DTE
13. A condition where all the load currents are equal and the neutral current is zero
Kirchoff's Current Law(KCL)
Balanced Load
Base
Baseline
14. To decrease the binary state of a counter by one
TTL
Decrement
Decade
Carry
15. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Circuit
DCE
bed- of- nails
Concurrency
16. The beginning address of a segment of memory
Base address
Digital linear tape
TTL
Demultiplexer
17. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
CPLD
Assembler
Bitstream
Bit time
18. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Acceptor
ABEL(Advance Boolean Expression Language)
Ammeter
Circuit Breaker
19. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
DAT
Boolean addition
Charge
Cross - assembler
20. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Decade
Debug
AHDL
Baseline
21. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
Warning
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on line
183
22. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
AWG
Commutative Law
Bode Plot
Dependency notation
23. American National Standards Institute
Choke
Decimal
ANSI
Charge
24. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Bus interface unit
CLB (Configurable Logic Block)
DIMM
Binary coded decimal
25. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Analog- to- digital (A/D) conversion
Collector
Bus
AWG
26. A circuit with a complete current path
Closed circuit
Alphanumeric
Center Tap
Duty cycle
27. Characterized by ten states or values
Apparent power
Decade
DRAM
Antifuse
28. An array of AND gates consisting of a matrix of programmable interconnection
Decimal
AND array
Ampere- hour(Ah) rating
Boolean addition
29. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Circular Mil (CM)
Bus contention
Control Unit
Assembler
30. A logic circuit used to add two binary numbers
Adder
Architecture
BEDO DRAM
Boolean expression
31. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Circuit
Byte
ASCII
DCE
32. A type of counter in which each stage is clocked from the output of the preceding stage.
Asynchronous counter
Current sinking
DIMM
Carry
33. The application of a dc voltage to an electronic device to produce a desired mode of operation
Circuit Breaker
DCE
Bias
Kirchoff's Current Law(KCL)
34. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Acceptor
Angular Velocity
Circuit Breaker
Central processing unit
35. A group of eight bits
Control Bus
Byte
Bitstream
Circuit
36. A program that converts English- like mnemonics into machine code
Assembler
Boolean algebra
Base address
AWG
37. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Band- stop filter
Don't Care...
Binary coded decimal
Admittance
38. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Boolean multiplication
Battery
ALU
Kirchoff's Voltage Law
39. Having two stable states. Flip- flops and latches are bistable multivibrators.
Ampere
Bistable
CPLD
AND
40. The process of producing an output carry in full- adder when both input bits are 1s.
Carry generation
Ampere
Analog- to- digital converter(ADC)
Design flow
41. Having two opposites charge carriers within the transistor structure
Bode Plot
CPLD
Bipolar
Branch
42. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Thevenin Equivalent Circuit
Bias
Control Bus
Architecture
43. One of the three regions in a bipolar junction transistor
Cross - assembler
Base
Address
Debug
44. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Cascade
BIOS
Boolean algebra
Access time
45. Digital audio tape; a type of magnetic tape format
Circular Mil (CM)
Bistable
Base address
DAT
46. The process that prevents two sources from using a bus at the same time
Duty cycle
Bus arbitration
Asynchronous counter
DMA
47. A digital circuit device that converts coded information into another (familiar) or noncoded form
BJT
TTL
Cross - assembler
Decoder
48. A programming language that uses English like words and has a one- to- one correspondence to machine language
Associative law
Bistable
Assembly language
Binary coded decimal
49. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Capacitance
Compiler
Cache memory
Data Sheet
50. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Cross - assembler
Binary coded decimal
Balanced Bridge
CMOS
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