SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
Carry propagation
Adjacency
Delta Modulation
2. A digital circuit device that converts coded information into another (familiar) or noncoded form
Boolean expression
Branch Current
Decoder
Central processing unit
3. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bus contention
Cache memory
Capacity
Center Tap
4. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
Bit time
Data bus
Analog
BJT
5. A combined coder and decoder
Current sinking
Central processing unit
Code
Digital linear tape
6. A circuit that prevents loading of an input or output
Asynchronous counter
Decrement
Data Selector
Buffer
7. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Delta Modulation
TTL
Clock
Charge
8. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
AND
Bus
Bit
Admittance
9. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Atom
Attenuation
Design flow
Band- pass filter
10. A circuit with a complete current path
Buffer
Closed circuit
Astable
Analog- to- digital converter(ADC)
11. Consisting of numerals - letters - and other characters
Capacitance
DSP
Astable
Alphanumeric
12. One of the three regions in a bipolar junction transistor
Carry generation
Dependency notation
Base
Combinational logic
13. A device used to convert an analog signal to a sequence of digital codes
Analog- to- digital converter(ADC)
Base
Bit
Byte
14. The time from the application of a valid memory address to the appearance of valid output data
Combinational logic
Access time
Bus interface unit
Dynamic Memory
15. A connection at the midpoint of a winding in a transformer
Center Tap
Digital linear tape
Demultiplexer
Bus contention
16. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Aliasing
Access time
CMOS
Data Selector
17. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
Analog- to- digital converter(ADC)
CMOS
Average value
18. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Balanced Bridge
Complement
Thevenin Equivalent Circuit
Demultiplexer
19. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Binary coded decimal
Data bus
Associative law
Carry propagation
20. A programming language that uses English like words and has a one- to- one correspondence to machine language
Astable
Adder
AWG
Assembly language
21. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Binary
Branch
Amplitude
D Flip-Flop
22. Information in numeric - alphabetic - or other form.
Clear
Dependency notation
Data
Cascade
23. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Capacitance
Address
Control Unit
Ampere
24. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Don't Care...
Clear
Control Unit
Average value
25. A type of inductor used to block or choke off high frequencies
Concurrency
Choke
CPLD
Bitstream
26. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Complement
Combinational logic
Distributive Law
Decoder
27. Having two stable states. Flip- flops and latches are bistable multivibrators.
Augend
Concurrency
Adjacency
Bistable
28. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Bandwidth
Admittance
Carry generation
AND gate
29. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Decade
Aliasing
Charge
30. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Circuit
Apparent power
ASCII
Boundary scan
31. The maximum value of a voltage or current
Circular Mil (CM)
Bit time
Amplitude
BJT
32. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Atomic number
Bode Plot
Cross - assembler
Counter
33. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Distributive Law
Decade Counter
Bidirectional shift Register
Component
34. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Bit time
Carry generation
Don't Care...
Kirchoff's Voltage Law
35. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Boolean addition
Combinational logic
CLB (Configurable Logic Block)
Acceptor
36. In a division operation the quantity that is being divided
Dividend
Capacitance
Code
Capacitor
37. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Debug
Control Bus
DMA
AND array
38. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Cascade
DSP
BJT
Ampere- hour(Ah) rating
39. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Attenuation
CMOS Complementary Metal Oxide Semiconductor
Byte
40. In addition - the number to which the addend is added
Distributive Law
Augend
Debug
Address Bus
41. One of the three regions in a bipolar Junction transistor(North junction of NpN)
AND gate
Collector
Comparator
Assembly language
42. Digital Signal Processor; a special type of microprocessor that processes data in real time
Boolean expression
Dependency notation
DSP
Concurrency
43. An electrical instrument used to measure current
Address
Ammeter
Collector
Choke
44. Data Communications equipment
DCE
Base address
Controller
Average value
45. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
46. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
DRAM
Kirchoff's Voltage Law
Carry propagation
Address Bus
47. Burst extended data output dynamic random- access memory
Data Sheet
Carry
Address
BEDO DRAM
48. American Standard Code for Information Interchange; the most widely used alphanumeric code.
ASCII
CMOS
Compiler
Attenuation
49. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
AHDL
Associative law
Kirchoff's Current Law(KCL)
CMOS
50. The application of a dc voltage to an electronic device to produce a desired mode of operation
Bias
Amplitude
ANSI
Analog