SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Analog- to- digital converter(ADC)
Clear
Band- stop filter
Charge- coupled device
2. Burst extended data output dynamic random- access memory
Clear
Ampere
DSP
BEDO DRAM
3. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Dynamic Memory
Bode Plot
Clock
DMA
4. A series of bits describing a final design that is sent to the target device during programming
Circuit
ASCII
Bitstream
Circuit Breaker
5. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Center Tap
Digital linear tape
Amplitude
DAT
6. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
TTL
DCE
Associative law
Average value
7. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
CMOS Complementary Metal Oxide Semiconductor
Angular Velocity
Control Unit
Bleeder Current
8. In Boolean algebra - the OR operation
Bandwidth
Bus contention
Boolean addition
Dividend
9. One of the three regions in a bipolar junction transistor
D Flip-Flop
Base
Decimal
Bipolar
10. A binary digit - which can be either 1 or 0
Circuit
Bit
AND gate
Addend
11. The process or sequence of operations carried out to program a target device
Design flow
Ampere- hour(Ah) rating
Decode
DSP
12. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Choke
Thevenin Equivalent Circuit
Bus interface unit
Astable
13. Having two stable states. Flip- flops and latches are bistable multivibrators.
Duty cycle
Bistable
Bias
Access time
14. A digital circuit device that converts coded information into another (familiar) or noncoded form
Atomic number
Decoder
Distributive Law
Duty cycle
15. The digit generated when the sum of two binary digits exceeds 1
Carry
Capacity
Current sinking
Don't Care...
16. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
Bus arbitration
Cross - assembler
Bistable
17. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Bipolar
Decade Counter
Architecture
Cross - assembler
18. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Closed circuit
Architecture
Band- pass filter
Ampere- hour(Ah) rating
19. American wire gauge; a standardization based on wire diameter
AWG
Baseline
Ampere
Compiler
20. The process that prevents two sources from using a bus at the same time
Bus arbitration
Data
Antifuse
Acceptor
21. To decrease the binary state of a counter by one
Address
Decrement
Data Sheet
Concurrency
22. A condition where all the load currents are equal and the neutral current is zero
Charge
Demultiplexer
Balanced Load
Debug
23. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Charge
DRAM
DSP
BEDO DRAM
24. In addition - the number to which the addend is added
Augend
Decrement
AND array
Circuit
25. In a division operation the quantity that is being divided
Dividend
AHDL
CMOS
Astable
26. Transistor-Transistor Logic and is implemented with bipolar junction transistors
TTL
DRAM
AWG
Data
27. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
ABEL(Advance Boolean Expression Language)
Band- stop filter
Decoder
Bidirectional shift Register
28. A digital counter having ten states
DIMM
Decade Counter
Decoder
Decode
29. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
ASCII
Bus interface unit
BJT
Attenuation
30. The number of protons in a nucleus
AND array
Atomic number
Bistable
Array
31. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Address Bus
DRAM
Bandwidth
Access time
32. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Circuit
CPLD
Bus contention
Binary
33. American National Standards Institute
Ampere
Collector
ANSI
ALU
34. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Analog
Counter
Addend
Asynchronous counter
35. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Byte
Address Bus
Carry
Assembler
36. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Analog- to- digital converter(ADC)
Central processing unit
CMOS
Buffer
37. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Data bus
Addend
Antifuse
Ampere
38. The current left after the total load current is subtracted from the total current into the circuit
Attenuation
Bleeder Current
Code
Control Bus
39. A unit of the cross - sectional area of a wire.
AND array
Associative law
Circular Mil (CM)
Adder
40. Digital audio tape; a type of magnetic tape format
DSP
Battery
Bandwidth
DAT
41. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Cache memory
Carry propagation
Attenuation
Antifuse
42. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Baseline
Decrement
ANSI
Adjacency
43. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Branch
Boolean expression
CLB (Configurable Logic Block)
Balanced Load
44. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Demultiplexer
Architecture
Cascade
Vx=(Vs * Rx) /RT
45. A class of integrated logic circuits that is implemented with a type of field effect transistor
Astable
CMOS Complementary Metal Oxide Semiconductor
Carry generation
Decrement
46. Sum of all the voltage drops in series equals to the source voltage
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
47. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Band- stop filter
Vx=(Vs * Rx) /RT
Data Selector
Branch
48. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Baseline
BIOS
Demultiplexer
Dual in - line package
49. American Standard Code for Information Interchange; the most widely used alphanumeric code.
ASCII
Amplitude
Apparent power
Central processing unit
50. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Collector
Distributive Law
Commutative Law
Duty cycle