SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Cross - assembler
Concurrency
Circuit
Boolean algebra
2. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Concurrency
Distributive Law
Binary
Collector
3. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Acceptor
Commutative Law
Bus
Branch Current
4. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Amplitude
Demultiplexer
Adder
Carry generation
5. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Bus contention
Adjacency
Binary
Bias
6. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Charge- coupled device
Data bus
Dynamic Memory
CMOS
7. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Center Tap
Central processing unit
Binary coded decimal
Array
8. Sum of all the voltage drops in series equals to the source voltage
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
9. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Bit
bed- of- nails
Band- pass filter
Capacity
10. The unit of electrical current
Autotransformer
Bus
Dual in - line package
Ampere
11. A circuit that prevents loading of an input or output
Buffer
Current sinking
Cache memory
Norton's Theorem
12. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
Atomic number
Buffer
ALU
DIMM
13. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Ammeter
Carry propagation
Attenuation
Acceptor
14. Data Terminal equipment
Battery
DTE
Augend
CMOS Complementary Metal Oxide Semiconductor
15. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Duty cycle
Average value
Boolean algebra
Binary
16. A document that specifies parameter values and operating conditions for an integrated circuits or other device
AHDL
Data Sheet
AWG
Capacitance Reactance
17. The process that prevents two sources from using a bus at the same time
CLB (Configurable Logic Block)
Astable
Don't Care...
Bus arbitration
18. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Closed circuit
Angular Velocity
DIMM
Binary coded decimal
19. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Collector
Bias
Bus contention
Clear
20. The maximum value of a voltage or current
Branch
BJT
Amplitude
Apparent power
21. A condition where all the load currents are equal and the neutral current is zero
Atomic number
AND
Balanced Load
Byte
22. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Buffer
ANSI
AND
Admittance
23. A receiving device on a bus
DMA
Aliasing
Acceptor
CLB (Configurable Logic Block)
24. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Controller
Capacity
Bandwidth
AND gate
25. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
Bleeder Current
ASCII
BJT
Capacity
26. A series of bits describing a final design that is sent to the target device during programming
Adjacency
Circuit
Code
Bitstream
27. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Circuit Breaker
Diode
Combinational logic
Circuit
28. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
BEDO DRAM
Admittance
Bit time
Control Bus
29. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Address
Distributive Law
Apparent power
Component
30. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Central processing unit
Analog- to- digital converter(ADC)
Branch
Decrement
31. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Bus
Analog- to- digital (A/D) conversion
Branch Current
Charge
32. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Binary coded decimal
Attenuation
BIOS
Digital linear tape
33. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Circuit
Component
Choke
Apparent power
34. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Bitstream
Bode Plot
Kirchoff's Current Law(KCL)
Decode
35. In a division operation the quantity that is being divided
Demultiplexer
Code
Dividend
Decimal
36. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
BJT
Decade
DMA
Kirchoff's Current Law(KCL)
37. A digital circuit device that converts coded information into another (familiar) or noncoded form
Antifuse
Boolean addition
DRAM
Decoder
38. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Amplitude
Atomic number
ASCII
Associative law
39. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
TTL
Bit
Concurrency
Baseline
40. The number of protons in a nucleus
Decade
Atom
Atomic number
Debug
41. A combined coder and decoder
Branch
Dynamic Memory
Code
Carry
42. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Control Bus
Cascade
Compiler
Decade
43. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Control Bus
CLB (Configurable Logic Block)
Dividend
CMOS
44. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Current sinking
Thevenin Equivalent Circuit
Combinational logic
Central processing unit
45. In addition - the number that is added to another number called the augend
Augend
Boolean addition
Decrement
Addend
46. A set of interconnections that interface one or more devices based on a standardized specification
Binary
Bus
Combinational logic
Circuit
47. A logic gate that produces a High output only when all of the inputs are HIGH
AND
AND gate
Cascade
Array
48. A unit of the cross - sectional area of a wire.
Circular Mil (CM)
Control Unit
Closed circuit
DMA
49. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Alphanumeric
Carry propagation
Address Bus
Branch
50. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Attenuation
Balanced Bridge
Cache memory
Clock