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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CPLD
CLB (Configurable Logic Block)
Collector
Ampere
2. A type of counter in which each stage is clocked from the output of the preceding stage.
Asynchronous counter
Addend
bed- of- nails
Bandwidth
3. A combined coder and decoder
Code
AND gate
Duty cycle
Capacitance
4. A unit of the cross - sectional area of a wire.
Don't Care...
Circular Mil (CM)
Control Bus
Carry propagation
5. A circuit that prevents loading of an input or output
Dependency notation
Bidirectional shift Register
Buffer
ASCII
6. An array of AND gates consisting of a matrix of programmable interconnection
AND array
Attenuation
Data bus
Capacitance
7. The process or sequence of operations carried out to program a target device
Baseline
Asynchronous counter
Design flow
Commutative Law
8. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Analog
Digital linear tape
DTE
Ampere- hour(Ah) rating
9. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Comparator
Dual in - line package
Vx=(Vs * Rx) /RT
TTL
10. A resettable protective device used for interrupting execessive current in an electric circuit
Circuit Breaker
DAT
DRAM
Counter
11. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
AND array
Atom
Balanced Load
Data Selector
12. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Circuit
Comparator
Thevenin Equivalent Circuit
BIOS
13. The unit of electrical current
Buffer
Ammeter
Ampere
Bus interface unit
14. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Baseline
Astable
Autotransformer
Bus arbitration
15. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Bit time
Address
Charge
Bus interface unit
16. The time from the application of a valid memory address to the appearance of valid output data
Alphanumeric
Access time
Capacity
DRAM
17. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Circuit Breaker
AND gate
Boundary scan
Capacity
18. Describes a number system with a base of ten
DAT
Clock
Decimal
Complement
19. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Data Sheet
Component
Vx=(Vs * Rx) /RT
Analog- to- digital (A/D) conversion
20. Dual in - line memory module
DIMM
Counter
Carry
Bistable
21. The action of a circuit in which it accepts current into its output from a load
Current sinking
Average value
Digital linear tape
Buffer
22. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Carry
Decade
Average value
Attenuation
23. A digital counter having ten states
Base
Decade Counter
Decade
Bus arbitration
24. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Addend
Assembly language
Decode
ASCII
25. A group of eight bits
Boolean expression
Buffer
Byte
Attenuation
26. In a division operation the quantity that is being divided
Dividend
Associative law
Comparator
Base address
27. An expression of variables and operators used to express the operation of a logic circuit
Boolean expression
Assembly language
Counter
Balanced Bridge
28. American National Standards Institute
ANSI
Associative law
Boolean expression
Admittance
29. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Capacity
Comparator
Circuit
Balanced Load
30. The process of producing an output carry in full- adder when both input bits are 1s.
Carry generation
DRAM
ANSI
Comparator
31. The current left after the total load current is subtracted from the total current into the circuit
Asynchronous counter
Addend
Bleeder Current
Boolean expression
32. The application of a dc voltage to an electronic device to produce a desired mode of operation
Bode Plot
CPLD
Band- stop filter
Bias
33. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Angular Velocity
AND
Demultiplexer
Bus interface unit
34. A method of analog- to- digital conversion using a 1- bit quantization process
DIMM
Delta Modulation
CMOS Complementary Metal Oxide Semiconductor
Acceptor
35. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Concurrency
Antifuse
Base
Circuit
36. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Kirchoff's Current Law(KCL)
Decade
Ampere
Amplitude
37. A logic gate that produces a High output only when all of the inputs are HIGH
Decade Counter
AND gate
CMOS Complementary Metal Oxide Semiconductor
Amplitude
38. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Data bus
Base address
Byte
Central processing unit
39. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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40. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
Baseline
CMOS Complementary Metal Oxide Semiconductor
Thevenin Equivalent Circuit
41. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Access time
Assembler
Battery
Asynchronous counter
42. A connection at the midpoint of a winding in a transformer
Bias
Center Tap
Carry propagation
TTL
43. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Decoder
Architecture
Apparent power
DMA
44. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Base address
Vx=(Vs * Rx) /RT
Bit time
AND gate
45. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Associative law
Bus interface unit
Autotransformer
Bus contention
46. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Analog
Decimal
DTE
Analog- to- digital (A/D) conversion
47. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
DTE
Adder
Clear
DAT
48. Data Terminal equipment
Collector
DTE
Amplitude
Cache memory
49. A binary digit - which can be either 1 or 0
Attenuation
BJT
Bit
Dual in - line package
50. Altera HDL; a nonstandard HDL
Decode
bed- of- nails
AHDL
Amplitude