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Digital Fundamentals

Subject : engineering
Instructions:
  • Answer 50 questions in 15 minutes.
  • If you are not ready to take this test, you can study here.
  • Match each statement with the correct term.
  • Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.

This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits






2. A method for internally testing a PLD based on the JTAG standard (IEEE std.)






3. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference






4. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory






5. Information in numeric - alphabetic - or other form.






6. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.






7. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits






8. Sum of all the voltage drops in series equals to the source voltage

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9. The beginning address of a segment of memory






10. Burst extended data output dynamic random- access memory






11. In Boolean algebra - the OR operation






12. A semiconductor device that conducts current in only one direction






13. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor






14. The interval of time occupied by a single bit in a sequence of bits; the period of the clock






15. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter






16. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's






17. A type of IC package whose leads must pass through holes to the other side of a PC board






18. A combined coder and decoder






19. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1






20. The total number of data units(bits - nibbles - bytes - words) that a memory can store.






21. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference






22. A connection at the midpoint of a winding in a transformer






23. A type of counter in which each stage is clocked from the output of the preceding stage.






24. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed






25. A class of integrated logic circuits that is implemented with a type of field effect transistor






26. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.






27. American Standard Code for Information Interchange; the most widely used alphanumeric code.






28. Having two directions. the stored data can be shifted right or left






29. The application of a dc voltage to an electronic device to produce a desired mode of operation






30. The actual current in a branch






31. The digit generated when the sum of two binary digits exceeds 1






32. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.






33. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus






34. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices






35. One of the three regions in a bipolar Junction transistor(North junction of NpN)






36. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte






37. The ability of a capacitor to store electrical charge.






38. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification

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39. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage






40. The time from the application of a valid memory address to the appearance of valid output data






41. The normal level of a pulse waveform; the voltage level in the absence of a pulse.






42. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.






43. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points






44. A logic circuit used to add two binary numbers






45. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents






46. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function






47. A digital circuit device that converts coded information into another (familiar) or noncoded form






48. A condition where all the load currents are equal and the neutral current is zero






49. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent






50. A circuit that prevents loading of an input or output