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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Norton's Theorem
Astable
Band- stop filter
Charge- coupled device
2. A type of counter in which each stage is clocked from the output of the preceding stage.
AND
Asynchronous counter
Kirchoff's Current Law(KCL)
DIMM
3. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Ampere- hour(Ah) rating
Access time
Address
bed- of- nails
4. The process of producing an output carry in full- adder when both input bits are 1s.
Clock
Controller
Carry generation
DRAM
5. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Associative law
Analog
AWG
Amplitude
6. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Ampere- hour(Ah) rating
TTL
Capacitance Reactance
Dynamic Memory
7. The action of a circuit in which it accepts current into its output from a load
Adder
Current sinking
Analog- to- digital (A/D) conversion
CPLD
8. The unit of electrical current
Ampere
Carry
Delta Modulation
DRAM
9. Digital audio tape; a type of magnetic tape format
TTL
DAT
Ampere- hour(Ah) rating
ASCII
10. A condition where all the load currents are equal and the neutral current is zero
Demultiplexer
Antifuse
Balanced Load
Addend
11. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Balanced Bridge
Design flow
Boundary scan
Bus contention
12. Characterized by ten states or values
Circuit
Decade
Carry propagation
DSP
13. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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14. A digital circuit device that converts coded information into another (familiar) or noncoded form
Amplitude
Concurrency
Bitstream
Decoder
15. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Counter
Capacitor
Balanced Bridge
Autotransformer
16. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Kirchoff's Current Law(KCL)
Binary coded decimal
BIOS
Astable
17. Information in numeric - alphabetic - or other form.
Baseline
CMOS Complementary Metal Oxide Semiconductor
Data
Dual in - line package
18. A program that converts English- like mnemonics into machine code
Address
Assembler
Bus
Binary coded decimal
19. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Central processing unit
ASCII
Control Unit
Boolean expression
20. The ability of a capacitor to store electrical charge.
Capacitance Reactance
Ammeter
Capacitance
Ampere- hour(Ah) rating
21. The beginning address of a segment of memory
Debug
Don't Care...
Base address
BJT
22. A software compiler language for SPLD programming; a type of hardware description language (HDL)
ABEL(Advance Boolean Expression Language)
Boolean expression
Decimal
Distributive Law
23. Burst extended data output dynamic random- access memory
Combinational logic
CLB (Configurable Logic Block)
Boolean expression
BEDO DRAM
24. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Boolean multiplication
CMOS Complementary Metal Oxide Semiconductor
Apparent power
Controller
25. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Address Bus
Center Tap
Distributive Law
Binary
26. In Boolean algebra - the OR operation
Circuit
Alphanumeric
Adjacency
Boolean addition
27. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Closed circuit
Bus interface unit
Carry
AND gate
28. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Decode
Cache memory
Analog
Address
29. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Code
Ammeter
Bit time
Bistable
30. A circuit that prevents loading of an input or output
Cross - assembler
Vx=(Vs * Rx) /RT
Buffer
Decode
31. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Circuit
Associative law
Array
Band- stop filter
32. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Address Bus
Capacitance Reactance
Dividend
Bistable
33. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Concurrency
Clear
Antifuse
Astable
34. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Clear
Address Bus
Angular Velocity
Ampere- hour(Ah) rating
35. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Digital linear tape
Bit
Binary
Bidirectional shift Register
36. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Collector
Data Selector
Boolean addition
Data
37. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Decimal
Controller
Apparent power
Bleeder Current
38. A unit of the cross - sectional area of a wire.
Bus
AND
Circular Mil (CM)
Byte
39. A programming language that uses English like words and has a one- to- one correspondence to machine language
Battery
Aliasing
DAT
Assembly language
40. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Cache memory
Comparator
Control Unit
Dividend
41. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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42. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Balanced Load
Bipolar
Bandwidth
Debug
43. An array of AND gates consisting of a matrix of programmable interconnection
AND array
Concurrency
Adjacency
Circuit
44. A semiconductor device that conducts current in only one direction
Assembler
Diode
Comparator
Balanced Bridge
45. In Boolean algebra - the AND operation
Carry generation
Boolean multiplication
Debug
Digital linear tape
46. A resettable protective device used for interrupting execessive current in an electric circuit
Circuit Breaker
Center Tap
Bitstream
AND gate
47. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
Decode
Ampere
Apparent power
48. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Design flow
Attenuation
Address Bus
Decrement
49. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Demultiplexer
Binary coded decimal
Addend
Data bus
50. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Decoder
Complement
Baseline
Boolean algebra