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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Having two opposites charge carriers within the transistor structure
Cross - assembler
Boolean multiplication
Analog- to- digital (A/D) conversion
Bipolar
2. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Band- stop filter
Bode Plot
Current sinking
Capacitor
3. The ability of a capacitor to store electrical charge.
Delta Modulation
Amplitude
Bus arbitration
Capacitance
4. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Associative law
Architecture
Band- pass filter
Demultiplexer
5. A binary digit - which can be either 1 or 0
Debug
Circular Mil (CM)
Bit
Battery
6. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Bit
Apparent power
Address Bus
Complement
7. Dual in - line memory module
DIMM
CPLD
Current sinking
Capacitor
8. A receiving device on a bus
Acceptor
Choke
BIOS
Comparator
9. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Byte
Bias
Cache memory
Battery
10. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Apparent power
Concurrency
Compiler
Don't Care...
11. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Central processing unit
BJT
DRAM
Angular Velocity
12. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Branch
Clock
Bus
Bus arbitration
13. A type of IC package whose leads must pass through holes to the other side of a PC board
Current sinking
Branch Current
Circuit Breaker
Dual in - line package
14. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Cascade
Controller
Ammeter
Amplitude
15. In a division operation the quantity that is being divided
Design flow
Dividend
Average value
Control Bus
16. A type of counter in which each stage is clocked from the output of the preceding stage.
Adjacency
Data Selector
Asynchronous counter
Digital linear tape
17. The mathematics of logic circuits
Comparator
Boolean algebra
Capacitor
CLB (Configurable Logic Block)
18. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Cross - assembler
Compiler
Alphanumeric
Assembler
19. The current left after the total load current is subtracted from the total current into the circuit
bed- of- nails
Cache memory
Comparator
Bleeder Current
20. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Circular Mil (CM)
Component
Carry propagation
TTL
21. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Autotransformer
ABEL(Advance Boolean Expression Language)
Decrement
Data
22. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Analog
Battery
Capacitance Reactance
Counter
23. The process of producing an output carry in full- adder when both input bits are 1s.
Carry generation
ASCII
Component
Architecture
24. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
BIOS
AND gate
Center Tap
DMA
25. The beginning address of a segment of memory
Compiler
Boolean multiplication
Base address
Assembly language
26. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Bus
Associative law
Bitstream
Norton's Theorem
27. The smallest particle of an element possessing the unique characteristics of that element.
Atom
Debug
CLB (Configurable Logic Block)
Current sinking
28. A programming language that uses English like words and has a one- to- one correspondence to machine language
Delta Modulation
Capacity
Assembly language
Analog
29. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Charge- coupled device
Cascade
Capacitance Reactance
Average value
30. Consisting of numerals - letters - and other characters
Choke
Alphanumeric
Bode Plot
Bus contention
31. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
DCE
Address Bus
bed- of- nails
Atomic number
32. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Address
Distributive Law
Astable
Architecture
33. Data Communications equipment
Boolean algebra
Complement
Distributive Law
DCE
34. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Distributive Law
Apparent power
Capacity
Admittance
35. A condition where all the load currents are equal and the neutral current is zero
Circuit
Distributive Law
Balanced Load
Boolean expression
36. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
AND array
CLB (Configurable Logic Block)
Dynamic Memory
Norton's Theorem
37. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CLB (Configurable Logic Block)
Kirchoff's Voltage Law
Clear
Atomic number
38. A semiconductor device that conducts current in only one direction
Diode
Boolean algebra
Design flow
Augend
39. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
Bistable
Analog
Ampere- hour(Ah) rating
BJT
40. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Cache memory
Controller
Control Bus
Thevenin Equivalent Circuit
41. A program that converts English- like mnemonics into machine code
Bus
Assembler
Boolean addition
Address Bus
42. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Controller
Vx=(Vs * Rx) /RT
Bistable
Attenuation
43. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Branch
DAT
Binary coded decimal
Commutative Law
44. A combined coder and decoder
Don't Care...
Code
Distributive Law
Design flow
45. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Dividend
Ammeter
Capacity
Cross - assembler
46. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
47. A resettable protective device used for interrupting execessive current in an electric circuit
Circuit Breaker
Boolean algebra
Buffer
Data Selector
48. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Bidirectional shift Register
Angular Velocity
BEDO DRAM
Control Bus
49. A circuit with a complete current path
Bidirectional shift Register
Closed circuit
AND gate
Band- stop filter
50. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
AND array
Astable
Atom
CLB (Configurable Logic Block)