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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A transformer in which the primary and secondary are in a single winding
Dividend
Debug
Autotransformer
Battery
2. A semiconductor device that conducts current in only one direction
Bit time
Addend
Binary coded decimal
Diode
3. To decrease the binary state of a counter by one
Capacitance Reactance
Collector
Decrement
AND array
4. Characterized by ten states or values
Closed circuit
Decade
Analog- to- digital converter(ADC)
Compiler
5. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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6. One of the three regions in a bipolar junction transistor
Boolean algebra
Distributive Law
Base
Bode Plot
7. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Balanced Load
Carry propagation
Demultiplexer
Adder
8. A circuit that prevents loading of an input or output
Dividend
Debug
Buffer
Access time
9. The action of a circuit in which it accepts current into its output from a load
Charge
Current sinking
Combinational logic
Cascade
10. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Circuit
Average value
Bode Plot
Architecture
11. In Boolean algebra - the OR operation
Dependency notation
Data Selector
Bus contention
Boolean addition
12. Consisting of numerals - letters - and other characters
Alphanumeric
Adjacency
Charge- coupled device
CPLD
13. Altera HDL; a nonstandard HDL
AHDL
Ampere- hour(Ah) rating
Charge- coupled device
Array
14. The process that prevents two sources from using a bus at the same time
Adjacency
Bus arbitration
Average value
D Flip-Flop
15. A logic gate that produces a High output only when all of the inputs are HIGH
Assembly language
Adjacency
BJT
AND gate
16. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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17. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Combinational logic
Capacitor
Binary
Atom
18. The number of protons in a nucleus
Cross - assembler
Atomic number
Design flow
AWG
19. A method of analog- to- digital conversion using a 1- bit quantization process
Delta Modulation
Ampere
Don't Care...
Bode Plot
20. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Capacitance
Boolean algebra
Component
Bus contention
21. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Controller
Control Bus
Bus interface unit
DMA
22. The current left after the total load current is subtracted from the total current into the circuit
Autotransformer
Cache memory
Bleeder Current
Associative law
23. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Branch
Component
ASCII
Charge
24. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Controller
Address
Acceptor
Control Unit
25. The digit generated when the sum of two binary digits exceeds 1
Carry
Band- stop filter
AWG
Bit time
26. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
bed- of- nails
Decimal
Augend
27. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Compiler
Cascade
Binary
Carry generation
28. Dual in - line memory module
DTE
Array
DIMM
Bus arbitration
29. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Complement
Capacity
Circuit
Kirchoff's Voltage Law
30. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Norton's Theorem
Vx=(Vs * Rx) /RT
Bistable
AWG
31. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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32. American wire gauge; a standardization based on wire diameter
AWG
Address Bus
Alphanumeric
Circular Mil (CM)
33. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Charge
Bipolar
CPLD
Adjacency
34. An array of AND gates consisting of a matrix of programmable interconnection
Baseline
AND array
BIOS
Complement
35. A type of inductor used to block or choke off high frequencies
Base address
DRAM
Choke
Demultiplexer
36. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Ammeter
Cascade
Cache memory
AWG
37. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Data Selector
Atom
Byte
Analog- to- digital converter(ADC)
38. The process of producing an output carry in full- adder when both input bits are 1s.
Collector
Carry generation
Capacitor
Control Unit
39. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Autotransformer
AHDL
Kirchoff's Current Law(KCL)
Apparent power
40. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
DMA
Commutative Law
ALU
Circuit Breaker
41. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Binary
Boolean algebra
Boolean multiplication
Alphanumeric
42. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Dependency notation
BIOS
Cascade
Analog- to- digital (A/D) conversion
43. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Atomic number
AND gate
Charge
Counter
44. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Branch
DSP
Code
DRAM
45. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Control Bus
Digital linear tape
Astable
Asynchronous counter
46. A type of counter in which each stage is clocked from the output of the preceding stage.
Closed circuit
Asynchronous counter
Atomic number
DSP
47. An expression of variables and operators used to express the operation of a logic circuit
Boolean addition
Carry generation
Boolean expression
Commutative Law
48. Burst extended data output dynamic random- access memory
Attenuation
BEDO DRAM
ABEL(Advance Boolean Expression Language)
Clear
49. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Assembly language
Ampere- hour(Ah) rating
Decode
Bidirectional shift Register
50. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Bandwidth
Bistable
Collector
CMOS