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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Carry generation
Code
Circuit
CLB (Configurable Logic Block)
2. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Charge
Carry propagation
Combinational logic
Array
3. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Ampere
Boolean addition
Capacitance Reactance
TTL
4. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Band- stop filter
Circuit Breaker
Concurrency
Cascade
5. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Cache memory
Adjacency
Boolean algebra
Average value
6. One current path in a parallel circuit; a current path that connects two nodes
Boolean multiplication
Concurrency
Branch
BEDO DRAM
7. The application of a dc voltage to an electronic device to produce a desired mode of operation
Bias
Dependency notation
Circuit
TTL
8. The ability of a capacitor to store electrical charge.
Address Bus
Capacitance
Control Unit
Battery
9. A type of magnetic tape format
Access time
Digital linear tape
Balanced Bridge
DSP
10. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Bistable
DMA
Dynamic Memory
DCE
11. Burst extended data output dynamic random- access memory
Bit time
Adjacency
Analog- to- digital converter(ADC)
BEDO DRAM
12. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Bus contention
Bias
Address
Acceptor
13. The process of converting an analog signal to digital form
Analog- to- digital (A/D) conversion
Circular Mil (CM)
Ampere- hour(Ah) rating
Decrement
14. In a division operation the quantity that is being divided
Ampere- hour(Ah) rating
Assembler
Analog
Dividend
15. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Analog
Byte
DMA
Battery
16. A program that converts English- like mnemonics into machine code
Adjacency
Distributive Law
Assembler
Dependency notation
17. A digital counter having ten states
Decode
Boolean algebra
Decade Counter
Admittance
18. In addition - the number to which the addend is added
Augend
Alphanumeric
Don't Care...
Boolean expression
19. Information in numeric - alphabetic - or other form.
Data
Cache memory
BJT
Apparent power
20. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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21. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
DMA
Baseline
Angular Velocity
Control Unit
22. A transformer in which the primary and secondary are in a single winding
Closed circuit
Collector
CLB (Configurable Logic Block)
Autotransformer
23. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Charge
Decrement
DAT
Duty cycle
24. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Aliasing
Collector
BJT
Ammeter
25. A series of bits describing a final design that is sent to the target device during programming
Addend
Choke
Component
Bitstream
26. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
CMOS
Adder
Capacity
Clear
27. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Angular Velocity
Bandwidth
Thevenin Equivalent Circuit
Decrement
28. A binary digit - which can be either 1 or 0
Don't Care...
Bit
Assembly language
Boolean multiplication
29. A device used to convert an analog signal to a sequence of digital codes
Assembly language
Acceptor
Compiler
Analog- to- digital converter(ADC)
30. Data Communications equipment
DCE
Choke
Buffer
D Flip-Flop
31. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
D Flip-Flop
Bus contention
BJT
Aliasing
32. A combined coder and decoder
AND
Carry propagation
ANSI
Code
33. Digital audio tape; a type of magnetic tape format
DIMM
Controller
Astable
DAT
34. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Vx=(Vs * Rx) /RT
Kirchoff's Current Law(KCL)
Balanced Bridge
Circuit
35. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Bit time
Bus
Band- pass filter
Admittance
36. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Address Bus
Average value
Apparent power
Comparator
37. A programming language that uses English like words and has a one- to- one correspondence to machine language
ALU
Bit time
Analog- to- digital (A/D) conversion
Assembly language
38. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Bit time
AND gate
Bit
Capacitance
39. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Boolean addition
Ammeter
Commutative Law
Control Bus
40. The time from the application of a valid memory address to the appearance of valid output data
Asynchronous counter
Duty cycle
Current sinking
Access time
41. A receiving device on a bus
CMOS
DMA
Admittance
Acceptor
42. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Current sinking
Charge
Distributive Law
Compiler
43. A condition where all the load currents are equal and the neutral current is zero
Average value
Bitstream
Autotransformer
Balanced Load
44. The ratio of pulse width to period expressed as a percentage
Duty cycle
Bitstream
Binary coded decimal
Compiler
45. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Charge
AND
Complement
DMA
46. A type of IC package whose leads must pass through holes to the other side of a PC board
Dual in - line package
Capacitance Reactance
Carry
Architecture
47. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Bus arbitration
Ampere
DCE
Charge- coupled device
48. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Vx=(Vs * Rx) /RT
Amplitude
CMOS
Bus
49. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
CMOS Complementary Metal Oxide Semiconductor
Control Unit
Capacity
Digital linear tape
50. The smallest particle of an element possessing the unique characteristics of that element.
Component
Atom
Kirchoff's Current Law(KCL)
Bitstream