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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Controller
Kirchoff's Voltage Law
Band- stop filter
Band- pass filter
2. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Capacitance Reactance
Boundary scan
Augend
Charge- coupled device
3. An expression of variables and operators used to express the operation of a logic circuit
Admittance
CMOS
Boolean expression
Bus arbitration
4. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
CLB (Configurable Logic Block)
Control Bus
Cross - assembler
DIMM
5. A unit of the cross - sectional area of a wire.
Circular Mil (CM)
Decade
Central processing unit
Acceptor
6. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Dependency notation
Collector
DTE
Alphanumeric
7. A condition where all the load currents are equal and the neutral current is zero
Boolean multiplication
Balanced Load
Address Bus
Kirchoff's Voltage Law
8. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CLB (Configurable Logic Block)
Baseline
DMA
Boolean multiplication
9. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
DRAM
Baseline
Demultiplexer
DAT
10. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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11. One of the three regions in a bipolar junction transistor
Bitstream
Bandwidth
Base
DRAM
12. An electrical instrument used to measure current
Carry
Ammeter
Code
TTL
13. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Control Unit
Circuit
Distributive Law
Admittance
14. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
Kirchoff's Voltage Law
AND array
CMOS
Adjacency
15. In Boolean algebra - the AND operation
Average value
Boolean multiplication
Band- pass filter
Antifuse
16. A device used to convert an analog signal to a sequence of digital codes
Comparator
Analog- to- digital converter(ADC)
Data Sheet
Bus arbitration
17. A type of inductor used to block or choke off high frequencies
Choke
Ampere- hour(Ah) rating
Branch Current
Complement
18. In addition - the number to which the addend is added
Atom
Augend
Balanced Bridge
Base
19. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Dynamic Memory
Amplitude
Control Bus
Attenuation
20. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Comparator
Dynamic Memory
Center Tap
Battery
21. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Binary
Array
Code
Boolean multiplication
22. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
Duty cycle
Boolean expression
Balanced Load
23. The process of converting an analog signal to digital form
Cache memory
Adder
Base address
Analog- to- digital (A/D) conversion
24. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Array
Apparent power
Dynamic Memory
bed- of- nails
25. A method of analog- to- digital conversion using a 1- bit quantization process
TTL
BIOS
Delta Modulation
Boolean expression
26. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
AND gate
Bus interface unit
CMOS
Bias
27. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Choke
DAT
Bit time
Boolean expression
28. A circuit that prevents loading of an input or output
Buffer
Bus contention
Decade Counter
D Flip-Flop
29. Altera HDL; a nonstandard HDL
AHDL
Center Tap
Attenuation
DSP
30. Characterized by ten states or values
Decade
Bus
DSP
Digital linear tape
31. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Aliasing
AND
Capacitance
Dynamic Memory
32. The ratio of pulse width to period expressed as a percentage
Duty cycle
Band- stop filter
Analog- to- digital (A/D) conversion
Address
33. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Cascade
Average value
Don't Care...
Autotransformer
34. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Access time
Bode Plot
Admittance
Bipolar
35. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Bistable
CMOS Complementary Metal Oxide Semiconductor
Debug
ASCII
36. In addition - the number that is added to another number called the augend
Decrement
Boolean addition
Addend
Balanced Load
37. One current path in a parallel circuit; a current path that connects two nodes
Average value
Attenuation
Commutative Law
Branch
38. A class of integrated logic circuits that is implemented with a type of field effect transistor
DTE
CMOS Complementary Metal Oxide Semiconductor
AWG
Dependency notation
39. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Charge
Decode
bed- of- nails
Address
40. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Controller
Component
Admittance
Architecture
41. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Admittance
Dynamic Memory
Central processing unit
Diode
42. Having two stable states. Flip- flops and latches are bistable multivibrators.
Buffer
Admittance
Bistable
Capacitance
43. A programming language that uses English like words and has a one- to- one correspondence to machine language
Assembly language
Decoder
BEDO DRAM
CMOS Complementary Metal Oxide Semiconductor
44. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Decade Counter
Apparent power
Branch
Capacity
45. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
DMA
Thevenin Equivalent Circuit
Circular Mil (CM)
DCE
46. A set of interconnections that interface one or more devices based on a standardized specification
Binary
Component
Bus
Bode Plot
47. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
Bistable
Autotransformer
BJT
Boundary scan
48. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Closed circuit
BIOS
Bandwidth
Dynamic Memory
49. The digit generated when the sum of two binary digits exceeds 1
Carry
Data Sheet
Alphanumeric
ASCII
50. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Commutative Law
Adjacency
Boolean expression
Component