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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Dependency notation
Apparent power
Carry propagation
Charge- coupled device
2. Having two opposites charge carriers within the transistor structure
DAT
Bipolar
Bode Plot
DMA
3. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Angular Velocity
Baseline
Duty cycle
Architecture
4. The current left after the total load current is subtracted from the total current into the circuit
Bleeder Current
Bode Plot
Bandwidth
AND gate
5. The process of producing an output carry in full- adder when both input bits are 1s.
Addend
ABEL(Advance Boolean Expression Language)
Carry generation
Decode
6. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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7. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Asynchronous counter
AND array
Analog- to- digital (A/D) conversion
Controller
8. The digit generated when the sum of two binary digits exceeds 1
Bistable
Bus interface unit
Carry
Dynamic Memory
9. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Address Bus
Data bus
Balanced Bridge
Average value
10. A method of analog- to- digital conversion using a 1- bit quantization process
Charge
Atomic number
Delta Modulation
Boolean algebra
11. A set of interconnections that interface one or more devices based on a standardized specification
bed- of- nails
Assembly language
Average value
Bus
12. A connection at the midpoint of a winding in a transformer
ALU
Balanced Load
Closed circuit
Center Tap
13. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Ampere
Compiler
Cascade
Autotransformer
14. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Analog- to- digital converter(ADC)
Vx=(Vs * Rx) /RT
Charge
Ammeter
15. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Binary
Decimal
Band- pass filter
Bode Plot
16. An electrical instrument used to measure current
Alphanumeric
Analog
Ammeter
Boolean multiplication
17. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Dynamic Memory
Array
Address Bus
Thevenin Equivalent Circuit
18. An array of AND gates consisting of a matrix of programmable interconnection
Code
Angular Velocity
Diode
AND array
19. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
BJT
DTE
Balanced Load
Cross - assembler
20. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Circuit
Commutative Law
Thevenin Equivalent Circuit
Data
21. A type of inductor used to block or choke off high frequencies
Choke
Bitstream
Combinational logic
BIOS
22. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Closed circuit
Carry propagation
Thevenin Equivalent Circuit
Ampere
23. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Charge
BEDO DRAM
Amplitude
Bias
24. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Data
Antifuse
Acceptor
Comparator
25. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Complement
Average value
Addend
DAT
26. The process or sequence of operations carried out to program a target device
Baseline
Circuit Breaker
Design flow
Angular Velocity
27. A circuit that prevents loading of an input or output
Buffer
Antifuse
Data Selector
Decimal
28. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
Data Selector
Apparent power
Amplitude
Balanced Load
29. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
ASCII
ABEL(Advance Boolean Expression Language)
Attenuation
Diode
30. A class of integrated logic circuits that is implemented with a type of field effect transistor
Dynamic Memory
Bode Plot
CMOS
CMOS Complementary Metal Oxide Semiconductor
31. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Diode
Center Tap
Address
Dynamic Memory
32. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Assembly language
Digital linear tape
Associative law
AND
33. The ratio of pulse width to period expressed as a percentage
Vx=(Vs * Rx) /RT
Duty cycle
CPLD
Byte
34. The action of a circuit in which it accepts current into its output from a load
Angular Velocity
Central processing unit
ASCII
Current sinking
35. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Debug
Delta Modulation
Commutative Law
AND
36. American wire gauge; a standardization based on wire diameter
Capacitance Reactance
AWG
DRAM
Branch Current
37. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Commutative Law
Array
Vx=(Vs * Rx) /RT
Capacitor
38. Characterized by ten states or values
Admittance
DRAM
AHDL
Decade
39. The smallest particle of an element possessing the unique characteristics of that element.
Decade Counter
Atom
Thevenin Equivalent Circuit
Analog- to- digital (A/D) conversion
40. A unit of the cross - sectional area of a wire.
Circular Mil (CM)
DIMM
Apparent power
Access time
41. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
D Flip-Flop
Counter
Band- pass filter
CLB (Configurable Logic Block)
42. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Band- pass filter
Central processing unit
Address Bus
Combinational logic
43. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Comparator
Cross - assembler
Kirchoff's Voltage Law
Capacitance
44. A type of IC package whose leads must pass through holes to the other side of a PC board
Decode
Address Bus
Cache memory
Dual in - line package
45. One current path in a parallel circuit; a current path that connects two nodes
Diode
Assembly language
Branch
Circuit
46. A semiconductor device that conducts current in only one direction
Control Bus
Decimal
Diode
Bus arbitration
47. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Array
DMA
Admittance
Architecture
48. Having two stable states. Flip- flops and latches are bistable multivibrators.
Bistable
Control Bus
Bus arbitration
Charge
49. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Closed circuit
Bus contention
TTL
Norton's Theorem
50. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Adder
Dependency notation
Clear
DAT