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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Branch Current
Circuit Breaker
Bus contention
Antifuse
2. Information in numeric - alphabetic - or other form.
Bus arbitration
Bus contention
Decade Counter
Data
3. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Analog- to- digital converter(ADC)
Assembler
Bandwidth
Collector
4. An array of AND gates consisting of a matrix of programmable interconnection
Capacity
Carry propagation
AND array
Dynamic Memory
5. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Array
Capacitance Reactance
Alphanumeric
Thevenin Equivalent Circuit
6. To decrease the binary state of a counter by one
Battery
Byte
Decrement
Base address
7. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Analog
Bus arbitration
Diode
Address Bus
8. A type of IC package whose leads must pass through holes to the other side of a PC board
Component
Dual in - line package
CMOS Complementary Metal Oxide Semiconductor
DRAM
9. Data Communications equipment
Amplitude
Circuit
Ampere- hour(Ah) rating
DCE
10. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Central processing unit
Thevenin Equivalent Circuit
Capacitance Reactance
BJT
11. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Adjacency
Control Bus
Decoder
DSP
12. Describes a number system with a base of ten
Bit time
Astable
Decimal
Balanced Bridge
13. A type of magnetic tape format
Kirchoff's Voltage Law
Address Bus
Digital linear tape
Bleeder Current
14. A resettable protective device used for interrupting execessive current in an electric circuit
Capacitor
Cache memory
Carry generation
Circuit Breaker
15. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Decode
Ampere
Carry propagation
Balanced Load
16. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Controller
Carry propagation
Capacitance Reactance
Charge- coupled device
17. The time from the application of a valid memory address to the appearance of valid output data
Cascade
Access time
AWG
Buffer
18. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Control Bus
Battery
Band- pass filter
Cross - assembler
19. A semiconductor device that conducts current in only one direction
Center Tap
Control Bus
Antifuse
Diode
20. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
DRAM
Base address
Kirchoff's Voltage Law
Array
21. The ability of a capacitor to store electrical charge.
Architecture
Buffer
Capacitance
Circuit
22. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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23. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
BIOS
Address
AND gate
Base
24. Altera HDL; a nonstandard HDL
AHDL
Compiler
Duty cycle
Baseline
25. Having two opposites charge carriers within the transistor structure
Data Sheet
Code
Controller
Bipolar
26. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Center Tap
Band- pass filter
Bus interface unit
DCE
27. A type of inductor used to block or choke off high frequencies
Carry
Boolean expression
Choke
Dynamic Memory
28. A unit of the cross - sectional area of a wire.
DRAM
Demultiplexer
DTE
Circular Mil (CM)
29. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Asynchronous counter
Cascade
Clock
Component
30. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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31. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
Commutative Law
Bitstream
Band- stop filter
32. A receiving device on a bus
Capacity
Acceptor
DMA
AND gate
33. In Boolean algebra - the AND operation
Addend
Closed circuit
Boolean multiplication
Duty cycle
34. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
D Flip-Flop
Bit
Clear
Base
35. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Amplitude
Apparent power
Vx=(Vs * Rx) /RT
Compiler
36. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Battery
Comparator
Clear
Antifuse
37. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Address Bus
Atomic number
Address
Compiler
38. The ratio of pulse width to period expressed as a percentage
Digital linear tape
Binary
Clock
Duty cycle
39. A digital circuit device that converts coded information into another (familiar) or noncoded form
Admittance
Bode Plot
Decoder
Control Unit
40. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Base
CLB (Configurable Logic Block)
Carry
41. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Balanced Bridge
Byte
DMA
Central processing unit
42. The number of protons in a nucleus
CMOS
Atomic number
ALU
Dual in - line package
43. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Data Sheet
Attenuation
Choke
Branch
44. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Bandwidth
Center Tap
Complement
Boolean multiplication
45. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Combinational logic
Data Selector
Average value
Address Bus
46. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Dual in - line package
Binary
Design flow
Cache memory
47. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Amplitude
Adder
Comparator
Address
48. A binary digit - which can be either 1 or 0
Byte
Design flow
Bit
Base address
49. The beginning address of a segment of memory
Boolean addition
Analog
Base address
Aliasing
50. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Binary coded decimal
Cascade
Concurrency
ABEL(Advance Boolean Expression Language)