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Test your basic knowledge |
Digital Fundamentals
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Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
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Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
DCE
Cache memory
Boundary scan
Buffer
2. In Boolean algebra - the AND operation
Boolean expression
Balanced Bridge
Carry propagation
Boolean multiplication
3. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bandwidth
Kirchoff's Voltage Law
Boolean addition
Bus contention
4. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
DTE
Central processing unit
Commutative Law
bed- of- nails
5. Data Communications equipment
DCE
Thevenin Equivalent Circuit
Byte
Data Sheet
6. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Circuit
Architecture
Compiler
Bit
7. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Distributive Law
Carry
Aliasing
Band- stop filter
8. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Central processing unit
DRAM
Carry generation
Control Bus
9. A transformer in which the primary and secondary are in a single winding
Access time
Autotransformer
Boundary scan
DAT
10. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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11. A logic circuit used to add two binary numbers
Adder
Clear
Decade
Address Bus
12. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Bus interface unit
Cascade
Atomic number
Compiler
13. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Analog- to- digital (A/D) conversion
Commutative Law
Cascade
14. A programming language that uses English like words and has a one- to- one correspondence to machine language
Assembly language
DTE
Bistable
Ampere
15. A class of integrated logic circuits that is implemented with a type of field effect transistor
Binary
Aliasing
Comparator
CMOS Complementary Metal Oxide Semiconductor
16. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Capacitor
Balanced Load
Kirchoff's Voltage Law
Bias
17. The beginning address of a segment of memory
Bandwidth
Clear
Base address
Bidirectional shift Register
18. The process or sequence of operations carried out to program a target device
Carry propagation
Bistable
Design flow
DIMM
19. A type of magnetic tape format
Collector
Bit
ANSI
Digital linear tape
20. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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21. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Branch
Base address
AWG
Capacitance Reactance
22. The digit generated when the sum of two binary digits exceeds 1
Binary coded decimal
BJT
Carry
Adjacency
23. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Binary
Data bus
Assembler
Amplitude
24. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Bipolar
CLB (Configurable Logic Block)
Bleeder Current
Charge
25. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Capacitance
Augend
Circuit
Architecture
26. Altera HDL; a nonstandard HDL
Bode Plot
Attenuation
Combinational logic
AHDL
27. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Code
Angular Velocity
Bistable
bed- of- nails
28. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Decoder
Code
Baseline
AND array
29. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Aliasing
Circuit
Design flow
Carry generation
30. A unit of the cross - sectional area of a wire.
Asynchronous counter
Circular Mil (CM)
Component
Assembly language
31. A series of bits describing a final design that is sent to the target device during programming
Kirchoff's Voltage Law
Bitstream
Capacitance
Complement
32. The process of producing an output carry in full- adder when both input bits are 1s.
Dividend
Carry generation
Amplitude
BIOS
33. A group of eight bits
Byte
Data bus
ALU
Control Unit
34. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Analog- to- digital converter(ADC)
Clock
Ampere
35. The action of a circuit in which it accepts current into its output from a load
Atomic number
Dynamic Memory
Bit time
Current sinking
36. A logic gate that produces a High output only when all of the inputs are HIGH
Architecture
AND gate
Bus interface unit
Access time
37. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Comparator
Atom
CLB (Configurable Logic Block)
Boundary scan
38. A semiconductor device that conducts current in only one direction
Array
Admittance
Decoder
Diode
39. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Boundary scan
Decrement
Binary coded decimal
Central processing unit
40. A program that converts English- like mnemonics into machine code
Bleeder Current
Assembler
DAT
Bias
41. The process of converting an analog signal to digital form
Norton's Theorem
Analog- to- digital (A/D) conversion
Antifuse
Ampere- hour(Ah) rating
42. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
DTE
Atomic number
Data Selector
Architecture
43. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
D Flip-Flop
DCE
Asynchronous counter
Dynamic Memory
44. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Antifuse
Address Bus
Balanced Bridge
Buffer
45. The smallest particle of an element possessing the unique characteristics of that element.
Astable
Augend
Atom
Decade
46. Digital Signal Processor; a special type of microprocessor that processes data in real time
Apparent power
Band- stop filter
BIOS
DSP
47. The application of a dc voltage to an electronic device to produce a desired mode of operation
Bias
Capacity
Base
Data bus
48. The process that prevents two sources from using a bus at the same time
CMOS Complementary Metal Oxide Semiconductor
Bus arbitration
Bipolar
Bistable
49. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Bus interface unit
Access time
Augend
Controller
50. Having two opposites charge carriers within the transistor structure
AHDL
Circuit
Bipolar
Center Tap
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