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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
AND
DMA
Cascade
Band- pass filter
2. A combined coder and decoder
Circuit
Amplitude
Code
Clock
3. The beginning address of a segment of memory
Bandwidth
Kirchoff's Current Law(KCL)
Base address
DAT
4. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Ammeter
Commutative Law
Component
Clear
5. A binary digit - which can be either 1 or 0
CMOS
Bit
AND array
Distributive Law
6. A logic gate that produces a High output only when all of the inputs are HIGH
Angular Velocity
AND gate
Analog- to- digital converter(ADC)
DTE
7. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Demultiplexer
AND
Closed circuit
Choke
8. Sum of all the voltage drops in series equals to the source voltage
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9. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Charge
Buffer
AWG
Bus
10. A type of IC package whose leads must pass through holes to the other side of a PC board
Diode
Dual in - line package
Angular Velocity
Capacitance Reactance
11. The process that prevents two sources from using a bus at the same time
Architecture
Branch Current
Capacity
Bus arbitration
12. In a division operation the quantity that is being divided
Carry generation
Dividend
Thevenin Equivalent Circuit
Current sinking
13. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Carry propagation
Atom
Charge
Compiler
14. The time from the application of a valid memory address to the appearance of valid output data
Bit
Circular Mil (CM)
Debug
Access time
15. A condition where all the load currents are equal and the neutral current is zero
Address Bus
Balanced Load
Control Bus
Ammeter
16. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Dependency notation
Aliasing
Autotransformer
Current sinking
17. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Augend
AND gate
ABEL(Advance Boolean Expression Language)
Decade
18. Having two stable states. Flip- flops and latches are bistable multivibrators.
AHDL
Bistable
Dynamic Memory
Debug
19. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
AND array
Associative law
Circuit
Attenuation
20. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Boolean multiplication
Delta Modulation
Bode Plot
Angular Velocity
21. Characterized by ten states or values
Choke
Control Bus
Decade
Boundary scan
22. A measure of the ability of a reactive circuit to permit current; the reciprocal of impedance. the unit is the siemens
Controller
Bus contention
Address
Admittance
23. A set of interconnections that interface one or more devices based on a standardized specification
Decoder
Bus
Vx=(Vs * Rx) /RT
Control Bus
24. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Kirchoff's Current Law(KCL)
Angular Velocity
Bus arbitration
Admittance
25. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Controller
Bipolar
Distributive Law
Design flow
26. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Compiler
Decode
Commutative Law
Bandwidth
27. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
DCE
Cascade
DRAM
Ampere- hour(Ah) rating
28. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Analog- to- digital converter(ADC)
ALU
Comparator
Binary
29. Transistor-Transistor Logic and is implemented with bipolar junction transistors
TTL
Closed circuit
Duty cycle
Byte
30. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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31. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Astable
Dual in - line package
Branch Current
Carry propagation
32. An electrical instrument used to measure current
Band- pass filter
Adjacency
Ammeter
Boolean addition
33. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Component
Decimal
Analog
Buffer
34. Having two directions. the stored data can be shifted right or left
Bidirectional shift Register
Bleeder Current
Amplitude
Bus interface unit
35. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Bias
Asynchronous counter
Assembly language
bed- of- nails
36. Altera HDL; a nonstandard HDL
AHDL
Bus contention
Acceptor
Diode
37. The ability of a capacitor to store electrical charge.
Bus
Capacitance
Boundary scan
Data Sheet
38. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Carry propagation
Capacity
Baseline
Control Unit
39. The action of a circuit in which it accepts current into its output from a load
Bistable
Binary coded decimal
Current sinking
Cascade
40. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Alphanumeric
Collector
CMOS Complementary Metal Oxide Semiconductor
Binary
41. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Vx=(Vs * Rx) /RT
Charge- coupled device
Balanced Load
Address
42. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
Ammeter
Access time
ANSI
43. A receiving device on a bus
CMOS Complementary Metal Oxide Semiconductor
Augend
Acceptor
Demultiplexer
44. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Bidirectional shift Register
DRAM
Demultiplexer
Augend
45. A type of counter in which each stage is clocked from the output of the preceding stage.
Atomic number
Assembly language
Asynchronous counter
Decoder
46. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Boundary scan
ABEL(Advance Boolean Expression Language)
Capacitance
Clock
47. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
CMOS
Capacity
Antifuse
Array
48. Burst extended data output dynamic random- access memory
Astable
BEDO DRAM
Bus contention
Diode
49. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Cache memory
Decade
Aliasing
Thevenin Equivalent Circuit
50. The number of protons in a nucleus
Atomic number
BEDO DRAM
Closed circuit
Comparator