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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Counter
DRAM
Bias
Analog- to- digital (A/D) conversion
2. The action of a circuit in which it accepts current into its output from a load
Alphanumeric
Antifuse
Current sinking
Autotransformer
3. A type of magnetic tape format
Branch
Concurrency
Capacity
Digital linear tape
4. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Don't Care...
Alphanumeric
DSP
Commutative Law
5. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
ABEL(Advance Boolean Expression Language)
Amplitude
Assembly language
AHDL
6. A series of bits describing a final design that is sent to the target device during programming
CMOS
Bitstream
Design flow
Kirchoff's Current Law(KCL)
7. An array of AND gates consisting of a matrix of programmable interconnection
Bitstream
CLB (Configurable Logic Block)
Data
AND array
8. A digital circuit device that converts coded information into another (familiar) or noncoded form
Control Unit
Decoder
AHDL
Demultiplexer
9. The application of a dc voltage to an electronic device to produce a desired mode of operation
Bus contention
Bias
Address Bus
Decrement
10. A digital counter having ten states
Augend
D Flip-Flop
Decade Counter
Bistable
11. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Cache memory
Current sinking
Analog- to- digital (A/D) conversion
DMA
12. A logic gate that produces a High output only when all of the inputs are HIGH
Dual in - line package
AND gate
Carry propagation
DAT
13. The beginning address of a segment of memory
TTL
Bandwidth
Base address
Angular Velocity
14. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Atomic number
Antifuse
DSP
Clear
15. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Acceptor
Concurrency
Bistable
Decode
16. A combined coder and decoder
Balanced Load
ABEL(Advance Boolean Expression Language)
Adjacency
Code
17. A connection at the midpoint of a winding in a transformer
Battery
CMOS
ASCII
Center Tap
18. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
ALU
Capacitance Reactance
Bus contention
CLB (Configurable Logic Block)
19. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Charge- coupled device
Binary coded decimal
Binary
Bit time
20. The number of protons in a nucleus
Augend
Kirchoff's Voltage Law
Decrement
Atomic number
21. A binary digit - which can be either 1 or 0
Don't Care...
AWG
Bit
AND gate
22. A program that converts English- like mnemonics into machine code
Assembler
Decode
Baseline
Amplitude
23. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Comparator
Average value
Adjacency
Baseline
24. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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25. Consisting of numerals - letters - and other characters
ASCII
Alphanumeric
CMOS
Closed circuit
26. American National Standards Institute
Branch
Associative law
ANSI
Array
27. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Address Bus
AHDL
Adjacency
Cross - assembler
28. The current left after the total load current is subtracted from the total current into the circuit
Demultiplexer
Binary
Bleeder Current
Capacitance
29. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Collector
Bit time
Bus contention
Data bus
30. The process that prevents two sources from using a bus at the same time
Bistable
Bus arbitration
Carry generation
Branch
31. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Baseline
Apparent power
Atom
Atomic number
32. A circuit that prevents loading of an input or output
CMOS
Buffer
Cache memory
Branch
33. The ability of a capacitor to store electrical charge.
AND array
Data Sheet
Circuit
Capacitance
34. A type of IC package whose leads must pass through holes to the other side of a PC board
CPLD
Control Bus
Dual in - line package
Atom
35. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Clock
Duty cycle
DCE
Attenuation
36. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Center Tap
CLB (Configurable Logic Block)
AHDL
Aliasing
37. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
BIOS
Base address
Binary coded decimal
Balanced Bridge
38. A condition where all the load currents are equal and the neutral current is zero
Capacitance
CMOS
Balanced Load
Current sinking
39. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
CPLD
DAT
Cascade
Charge
40. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
CMOS Complementary Metal Oxide Semiconductor
Architecture
Charge
DRAM
41. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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42. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Analog- to- digital converter(ADC)
Duty cycle
Kirchoff's Current Law(KCL)
Angular Velocity
43. Digital Signal Processor; a special type of microprocessor that processes data in real time
DSP
Kirchoff's Current Law(KCL)
Dual in - line package
Counter
44. The process of converting an analog signal to digital form
Bipolar
Bleeder Current
Data bus
Analog- to- digital (A/D) conversion
45. Data Terminal equipment
Bus interface unit
DTE
Capacitor
Base
46. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Astable
Access time
Alphanumeric
Complement
47. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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48. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Balanced Bridge
Capacity
Bias
Code
49. Burst extended data output dynamic random- access memory
Dividend
Clear
Comparator
BEDO DRAM
50. The actual current in a branch
Debug
Data bus
Branch Current
Vx=(Vs * Rx) /RT