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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
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.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A binary digit - which can be either 1 or 0
Binary coded decimal
Data Sheet
Bit
Associative law
2. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
CLB (Configurable Logic Block)
BJT
bed- of- nails
Binary
3. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
BEDO DRAM
Carry propagation
Address
Decade
4. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Aliasing
Astable
Don't Care...
Counter
5. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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6. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Boundary scan
Balanced Load
Decrement
Component
7. A combined coder and decoder
Code
Boolean addition
Battery
Concurrency
8. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Average value
Bias
Dividend
ABEL(Advance Boolean Expression Language)
9. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Distributive Law
Component
Bit time
Architecture
10. A logic gate that produces a High output only when all of the inputs are HIGH
Acceptor
Data bus
AND gate
CMOS
11. In a division operation the quantity that is being divided
Duty cycle
Carry generation
Asynchronous counter
Dividend
12. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Code
Diode
Component
Clear
13. One of the three regions in a bipolar junction transistor
Counter
Base
Bode Plot
Capacitor
14. An electrical instrument used to measure current
DMA
Ammeter
Dynamic Memory
Bus contention
15. An expression of variables and operators used to express the operation of a logic circuit
Duty cycle
Atomic number
Bode Plot
Boolean expression
16. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Cascade
Carry
Adjacency
CMOS
17. The beginning address of a segment of memory
Don't Care...
Base address
Data Selector
Vx=(Vs * Rx) /RT
18. Sum of all the voltage drops in series equals to the source voltage
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19. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
D Flip-Flop
Decode
Distributive Law
Admittance
20. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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21. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CLB (Configurable Logic Block)
Branch
Bode Plot
CPLD
22. Information in numeric - alphabetic - or other form.
Collector
Data
Charge
Atomic number
23. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Decade
DAT
Attenuation
Decoder
24. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Access time
Binary
Closed circuit
Boolean algebra
25. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Average value
Cache memory
Bias
Data Selector
26. The time from the application of a valid memory address to the appearance of valid output data
Bit
Bitstream
Access time
Battery
27. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Combinational logic
Decimal
ASCII
DRAM
28. American wire gauge; a standardization based on wire diameter
AWG
Bidirectional shift Register
Boolean multiplication
DTE
29. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
BJT
Thevenin Equivalent Circuit
DAT
Debug
30. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Asynchronous counter
ABEL(Advance Boolean Expression Language)
ALU
Access time
31. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Control Unit
Charge
Baseline
CLB (Configurable Logic Block)
32. Dual in - line memory module
DIMM
Carry generation
Control Unit
Analog- to- digital (A/D) conversion
33. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Bipolar
Array
AWG
bed- of- nails
34. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Base address
Aliasing
Dynamic Memory
ABEL(Advance Boolean Expression Language)
35. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Clear
Demultiplexer
BJT
Dependency notation
36. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Charge
Central processing unit
CMOS Complementary Metal Oxide Semiconductor
Atomic number
37. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
bed- of- nails
Adder
Baseline
Dividend
38. The process that prevents two sources from using a bus at the same time
Commutative Law
Collector
Compiler
Bus arbitration
39. A type of inductor used to block or choke off high frequencies
Choke
Carry propagation
Attenuation
Bipolar
40. The action of a circuit in which it accepts current into its output from a load
Current sinking
Balanced Load
Alphanumeric
Attenuation
41. A nominally continuous electrical signal that varies in amplitude or frequency in response to changes in sound - light - heat - position - or pressure.
Counter
Analog
Assembly language
AHDL
42. The digit generated when the sum of two binary digits exceeds 1
Central processing unit
ALU
Charge- coupled device
Carry
43. A device used to convert an analog signal to a sequence of digital codes
Attenuation
Cache memory
Analog- to- digital converter(ADC)
Kirchoff's Current Law(KCL)
44. A method of analog- to- digital conversion using a 1- bit quantization process
Debug
Current sinking
Code
Delta Modulation
45. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
DSP
Data Sheet
Boundary scan
Binary
46. Having two opposites charge carriers within the transistor structure
Circuit Breaker
Band- stop filter
ASCII
Bipolar
47. One current path in a parallel circuit; a current path that connects two nodes
D Flip-Flop
Astable
Ampere
Branch
48. Characterized by ten states or values
Boolean expression
Decade
ALU
Bias
49. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Collector
Augend
Bus interface unit
Antifuse
50. In Boolean algebra - the AND operation
Capacitor
DSP
AND
Boolean multiplication
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