SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
bed- of- nails
Analog- to- digital (A/D) conversion
Complement
DCE
2. A unit of the cross - sectional area of a wire.
Bipolar
Circuit
Closed circuit
Circular Mil (CM)
3. A digital circuit that compares the magnitudes of two quantiities and produces an output indicating the relationship of the quantities
Comparator
Data
Choke
Carry generation
4. A logic circuit used to add two binary numbers
Adder
Atom
Band- stop filter
Ampere
5. In addition - the number to which the addend is added
Augend
Data
Bus contention
DRAM
6. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Collector
BJT
Band- pass filter
Addend
7. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Don't Care...
Bipolar
Vx=(Vs * Rx) /RT
TTL
8. The ratio of pulse width to period expressed as a percentage
Address
CLB (Configurable Logic Block)
Commutative Law
Duty cycle
9. A method of analog- to- digital conversion using a 1- bit quantization process
Autotransformer
Kirchoff's Voltage Law
Delta Modulation
Data bus
10. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Cache memory
Bus contention
Comparator
Code
11. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Decoder
Boundary scan
Dual in - line package
12. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Associative law
Duty cycle
Augend
Distributive Law
13. The actual current in a branch
Battery
Branch Current
Kirchoff's Current Law(KCL)
Base
14. Sum of all the voltage drops in series equals to the source voltage
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
15. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Bus interface unit
Control Bus
Norton's Theorem
Analog- to- digital converter(ADC)
16. A digital counter having ten states
Cache memory
Decade Counter
Ammeter
Bias
17. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Apparent power
Bode Plot
Charge
Diode
18. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Baseline
Base address
Cascade
Circuit
19. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Bandwidth
Boundary scan
CMOS
Circuit Breaker
20. A type of IC package whose leads must pass through holes to the other side of a PC board
Dual in - line package
Bus contention
Digital linear tape
TTL
21. A circuit that prevents loading of an input or output
Control Unit
Buffer
DIMM
CPLD
22. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Debug
Design flow
Ampere
Compiler
23. The process of producing an output carry in full- adder when both input bits are 1s.
Control Unit
Carry generation
Bode Plot
Circular Mil (CM)
24. One of the three regions in a bipolar junction transistor
bed- of- nails
DRAM
Concurrency
Base
25. The application of a dc voltage to an electronic device to produce a desired mode of operation
Norton's Theorem
Bias
Data Selector
Debug
26. Dual in - line memory module
Band- pass filter
Data bus
Comparator
DIMM
27. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Carry propagation
CMOS
Battery
Clear
28. Burst extended data output dynamic random- access memory
AND array
Ammeter
Bias
BEDO DRAM
29. Information in numeric - alphabetic - or other form.
Clock
Concurrency
Data
Bistable
30. A receiving device on a bus
AND gate
ASCII
Acceptor
Combinational logic
31. Data Communications equipment
DCE
Code
Cascade
Ampere
32. The process that prevents two sources from using a bus at the same time
Norton's Theorem
Angular Velocity
Bus arbitration
Carry generation
33. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Branch
Debug
Architecture
Thevenin Equivalent Circuit
34. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Circuit
Compiler
Diode
Decode
35. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Decode
Bistable
Binary
Concurrency
36. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Alphanumeric
Bleeder Current
Atomic number
Cache memory
37. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Decode
DTE
Debug
Digital linear tape
38. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
39. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Bus arbitration
DSP
Amplitude
Comparator
40. Having two stable states. Flip- flops and latches are bistable multivibrators.
Bistable
Bus
Closed circuit
Clear
41. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
TTL
Circuit
Decode
Clear
42. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Asynchronous counter
Aliasing
Antifuse
Commutative Law
43. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Center Tap
Address
Data Sheet
Control Bus
44. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Data Sheet
CMOS Complementary Metal Oxide Semiconductor
Ammeter
D Flip-Flop
45. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Address Bus
Base
Bus
Address
46. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Array
Decoder
Dependency notation
Angular Velocity
47. The maximum value of a voltage or current
Cross - assembler
Ampere- hour(Ah) rating
Circuit Breaker
Amplitude
48. The process or sequence of operations carried out to program a target device
Design flow
Cascade
ASCII
Decimal
49. A device used to convert an analog signal to a sequence of digital codes
Analog- to- digital converter(ADC)
Compiler
TTL
Baseline
50. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Bus contention
Address
Binary coded decimal
Cache memory