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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
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study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Kirchoff's Current Law(KCL)
AND array
Commutative Law
Debug
2. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Design flow
Data
Address
ABEL(Advance Boolean Expression Language)
3. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
DIMM
Capacitor
BJT
Attenuation
4. American National Standards Institute
ANSI
Ampere
Clock
Bidirectional shift Register
5. The time from the application of a valid memory address to the appearance of valid output data
AHDL
ALU
Access time
Ammeter
6. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
DAT
Attenuation
Controller
Data Selector
7. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
CPLD
Design flow
Adder
Bode Plot
8. A type of inductor used to block or choke off high frequencies
Base
Choke
TTL
Combinational logic
9. A transformer in which the primary and secondary are in a single winding
Analog
Asynchronous counter
Aliasing
Autotransformer
10. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Complement
Adder
Diode
CMOS
11. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Compiler
Ampere- hour(Ah) rating
Commutative Law
Concurrency
12. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Capacitance Reactance
Acceptor
Bandwidth
Dynamic Memory
13. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Boolean multiplication
Bit
Bus interface unit
Decrement
14. Altera HDL; a nonstandard HDL
AHDL
Choke
Boundary scan
Closed circuit
15. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
AHDL
Clear
Design flow
Dual in - line package
16. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Boolean algebra
DTE
Bus interface unit
Carry propagation
17. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Base address
Bandwidth
Dynamic Memory
AND gate
18. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Kirchoff's Current Law(KCL)
Current sinking
Demultiplexer
Duty cycle
19. A receiving device on a bus
AHDL
Atomic number
DCE
Acceptor
20. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Band- pass filter
Baseline
Component
Ampere- hour(Ah) rating
21. A connection at the midpoint of a winding in a transformer
Center Tap
Address Bus
Capacity
Boolean algebra
22. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Controller
Distributive Law
Analog- to- digital (A/D) conversion
AHDL
23. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Address Bus
CLB (Configurable Logic Block)
Band- pass filter
Dual in - line package
24. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Circuit
Decade Counter
Decade
Debug
25. A series of bits describing a final design that is sent to the target device during programming
Vx=(Vs * Rx) /RT
DIMM
Controller
Bitstream
26. The digit generated when the sum of two binary digits exceeds 1
Boolean addition
Bistable
Carry
Concurrency
27. The mathematics of logic circuits
Branch
CPLD
Battery
Boolean algebra
28. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
DMA
Bidirectional shift Register
Amplitude
Base address
29. A type of magnetic tape format
Digital linear tape
DSP
Bus contention
Bitstream
30. An expression of variables and operators used to express the operation of a logic circuit
AND gate
Atom
Boolean expression
Boolean addition
31. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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32. A logic gate that produces a High output only when all of the inputs are HIGH
AND gate
Apparent power
Balanced Bridge
Combinational logic
33. The process or sequence of operations carried out to program a target device
BEDO DRAM
Design flow
Astable
Balanced Load
34. A filter that rejects a range of frequencies lying between two critical frequencies and passes frequencies above and below that range.
Band- stop filter
Norton's Theorem
Architecture
Data bus
35. A method of analog- to- digital conversion using a 1- bit quantization process
Delta Modulation
Address
Control Unit
Charge
36. American wire gauge; a standardization based on wire diameter
AWG
Admittance
Aliasing
Current sinking
37. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Average value
Bit
ASCII
AND gate
38. The beginning address of a segment of memory
Base address
Cascade
Binary
Balanced Bridge
39. A type of IC package whose leads must pass through holes to the other side of a PC board
Dual in - line package
Capacitance
Balanced Load
Bleeder Current
40. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Asynchronous counter
Average value
Circuit Breaker
DCE
41. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Thevenin Equivalent Circuit
Asynchronous counter
Analog
Capacitance Reactance
42. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Baseline
Current sinking
Cascade
43. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Control Unit
Center Tap
Cross - assembler
D Flip-Flop
44. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Data bus
Data Selector
Control Unit
Bit time
45. A group of eight bits
Circuit
Demultiplexer
AND
Byte
46. Data Terminal equipment
DTE
Base
Capacitance
Dependency notation
47. Characterized by ten states or values
DAT
Choke
Autotransformer
Decade
48. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
Dependency notation
Clock
Array
DRAM
49. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
DTE
Vx=(Vs * Rx) /RT
Decode
Bistable
50. To decrease the binary state of a counter by one
Decrement
DRAM
Demultiplexer
Bus arbitration
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