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Test your basic knowledge |
Digital Fundamentals
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Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
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Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A logic gate that produces a High output only when all of the inputs are HIGH
Branch
AND gate
Assembler
Data Selector
2. Having two stable states. Flip- flops and latches are bistable multivibrators.
Bistable
Architecture
Decimal
Bus contention
3. An electrical instrument used to measure current
Ammeter
AND gate
Bleeder Current
Decimal
4. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Architecture
Charge- coupled device
ABEL(Advance Boolean Expression Language)
Bidirectional shift Register
5. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Address Bus
Decode
CLB (Configurable Logic Block)
Boolean algebra
6. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Carry generation
Boolean algebra
TTL
Code
7. An array of AND gates consisting of a matrix of programmable interconnection
CMOS Complementary Metal Oxide Semiconductor
AND array
Asynchronous counter
DTE
8. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
bed- of- nails
DMA
Data
Controller
9. A set of interconnections that interface one or more devices based on a standardized specification
Compiler
Kirchoff's Voltage Law
Bitstream
Bus
10. Having two directions. the stored data can be shifted right or left
Bode Plot
Decode
Attenuation
Bidirectional shift Register
11. Burst extended data output dynamic random- access memory
BEDO DRAM
Balanced Load
Collector
Decode
12. A class of integrated logic circuits that is implemented with a type of field effect transistor
Carry
CMOS Complementary Metal Oxide Semiconductor
Autotransformer
Don't Care...
13. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Battery
Byte
Analog- to- digital (A/D) conversion
Associative law
14. A receiving device on a bus
Acceptor
Boundary scan
AND gate
Base
15. Describes a number system with a base of ten
Assembly language
Bipolar
Decimal
Don't Care...
16. To decrease the binary state of a counter by one
Cascade
Decrement
Commutative Law
Capacitance Reactance
17. A type of inductor used to block or choke off high frequencies
CLB (Configurable Logic Block)
Antifuse
Choke
Amplitude
18. Sum of all currents entering a node is equal to the sum of all currents leaving the same node
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19. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Base address
Decade
ABEL(Advance Boolean Expression Language)
Carry propagation
20. Data Communications equipment
Baseline
Average value
DCE
Central processing unit
21. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
CPLD
Circuit
Commutative Law
Decode
22. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Bus interface unit
Balanced Load
Decoder
Adjacency
23. A circuit that selects data from several inputs one at a time in a sequence and places them on the output; also called a multiplexer.
Delta Modulation
Data Selector
Diode
Combinational logic
24. The digit generated when the sum of two binary digits exceeds 1
Ampere
Bus interface unit
Bipolar
Carry
25. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Control Bus
Bode Plot
Assembly language
Capacitance
26. The process of producing an output carry in full- adder when both input bits are 1s.
Carry generation
Battery
Byte
Thevenin Equivalent Circuit
27. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Bus contention
Complement
Demultiplexer
Component
28. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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29. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Amplitude
Decode
Baseline
Analog- to- digital (A/D) conversion
30. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Dependency notation
Code
Capacity
Compiler
31. The time from the application of a valid memory address to the appearance of valid output data
Access time
bed- of- nails
Carry
AWG
32. A digital counter having ten states
Circuit
Acceptor
Decade Counter
Bipolar
33. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
CMOS Complementary Metal Oxide Semiconductor
Aliasing
Array
Branch Current
34. A series of bits describing a final design that is sent to the target device during programming
Circuit Breaker
Boolean addition
Bitstream
Binary coded decimal
35. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Control Unit
Atom
Address Bus
Binary
36. A condition where all the load currents are equal and the neutral current is zero
Band- stop filter
Balanced Load
Admittance
Bleeder Current
37. A circuit with a complete current path
Digital linear tape
Comparator
Asynchronous counter
Closed circuit
38. The ability of a capacitor to store electrical charge.
Base
Capacitance Reactance
Capacitance
Base address
39. A binary digit - which can be either 1 or 0
Architecture
Bit
AND
Capacitance
40. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Bit time
Design flow
Bitstream
Buffer
41. Characterized by ten states or values
Adjacency
Decade
Circuit
CPLD
42. Voltage Divider Rule in determining TEC Thevenin Equivalence Circuit
Vx=(Vs * Rx) /RT
Bistable
Thevenin Equivalent Circuit
Branch
43. A unit of the cross - sectional area of a wire.
Bipolar
DAT
Atomic number
Circular Mil (CM)
44. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Address Bus
Digital linear tape
Buffer
Data Sheet
45. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Architecture
Dynamic Memory
Charge- coupled device
Antifuse
46. The process that prevents two sources from using a bus at the same time
Bus arbitration
Data Selector
Bias
Capacitance
47. The process or sequence of operations carried out to program a target device
Design flow
Circuit Breaker
Angular Velocity
DAT
48. One of the three regions in a bipolar junction transistor
Adder
Base
Bit time
Access time
49. Data Terminal equipment
Carry
DTE
BEDO DRAM
Admittance
50. Dual in - line memory module
Dynamic Memory
DIMM
ANSI
Bus interface unit
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