SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An adverse condition that could occur if two or more devices try to communicate at the same time on a bus
Bus contention
Adjacency
Antifuse
Digital linear tape
2. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
DIMM
Amplitude
Clock
Bidirectional shift Register
3. Characterized by ten states or values
Ampere
Balanced Bridge
Decade
Analog- to- digital converter(ADC)
4. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Amplitude
Cascade
Binary
Bus contention
5. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Balanced Bridge
Boolean expression
Counter
Band- pass filter
6. A programming language that uses English like words and has a one- to- one correspondence to machine language
Assembly language
Debug
CMOS
Autotransformer
7. A type of magnetic tape format
Assembly language
Digital linear tape
ABEL(Advance Boolean Expression Language)
Circuit
8. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Ampere- hour(Ah) rating
Binary coded decimal
ABEL(Advance Boolean Expression Language)
Concurrency
9. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Byte
Debug
Closed circuit
Associative law
10. The number of protons in a nucleus
Charge
Charge- coupled device
Atomic number
Clear
11. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Assembly language
Address
Circuit Breaker
Bode Plot
12. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Capacitor
Antifuse
CMOS
Data Sheet
13. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Cross - assembler
Circuit
Atomic number
ASCII
14. The ability of a capacitor to store electrical charge.
AHDL
Base
Capacitance
Clear
15. A circuit with a complete current path
Closed circuit
DSP
Apparent power
AND
16. In Boolean algebra - the OR operation
Boolean addition
Duty cycle
Baseline
ALU
17. Having two opposites charge carriers within the transistor structure
Bit
Assembler
Bipolar
Attenuation
18. A interconnection of electrical components designed to produce a desired result. A basic circuits consists of a source - a load and an interconnecting current path.
Decoder
Circuit
Circular Mil (CM)
Amplitude
19. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Address Bus
Vx=(Vs * Rx) /RT
Alphanumeric
Average value
20. Describes a number system with a base of ten
Capacitance Reactance
Address
Decimal
Charge
21. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Controller
Amplitude
Augend
Kirchoff's Voltage Law
22. Altera HDL; a nonstandard HDL
Kirchoff's Current Law(KCL)
Acceptor
Analog- to- digital (A/D) conversion
AHDL
23. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Vx=(Vs * Rx) /RT
Astable
AND array
Bias
24. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Bit time
Debug
Ammeter
Dependency notation
25. A unit of the cross - sectional area of a wire.
Bus
Branch
Comparator
Circular Mil (CM)
26. A class of integrated logic circuits that is implemented with a type of field effect transistor
DRAM
Current sinking
Binary coded decimal
CMOS Complementary Metal Oxide Semiconductor
27. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
bed- of- nails
Branch
Carry
Demultiplexer
28. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Boolean expression
Astable
DRAM
ALU
29. In addition - the number that is added to another number called the augend
Distributive Law
Commutative Law
CMOS
Addend
30. A receiving device on a bus
Bus arbitration
Acceptor
Center Tap
Assembler
31. A transformer in which the primary and secondary are in a single winding
Astable
Autotransformer
Angular Velocity
Closed circuit
32. A type of inductor used to block or choke off high frequencies
Choke
Kirchoff's Voltage Law
Bistable
DTE
33. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
TTL
Collector
ABEL(Advance Boolean Expression Language)
Architecture
34. In addition (ORing) and multiplication (ANDing) of two variables the order in which the variables are ORed or ANDed makes no difference
Commutative Law
Complement
Charge- coupled device
AND array
35. A digital counter having ten states
DRAM
Charge- coupled device
Control Bus
Decade Counter
36. Having two directions. the stored data can be shifted right or left
Asynchronous counter
Bidirectional shift Register
Assembly language
Capacity
37. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Design flow
Alphanumeric
Demultiplexer
CLB (Configurable Logic Block)
38. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Base address
Branch
Decrement
Data Sheet
39. An array of AND gates consisting of a matrix of programmable interconnection
Control Unit
AND array
Apparent power
Battery
40. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Carry
CLB (Configurable Logic Block)
D Flip-Flop
Architecture
41. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
Complement
Baseline
Comparator
CPLD
42. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
CMOS Complementary Metal Oxide Semiconductor
Charge
Clear
Band- stop filter
43. The smallest particle of an element possessing the unique characteristics of that element.
Atom
Cache memory
Asynchronous counter
Dynamic Memory
44. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
Band- pass filter
Average value
Cache memory
Compiler
45. Characteristic of cells in a Karnaugh map in which there is a single- variable change from one cell to another cell next to it on any of its four sides
Adjacency
Aliasing
Commutative Law
Astable
46. In addition - the number to which the addend is added
Augend
Bus arbitration
Thevenin Equivalent Circuit
Decimal
47. In Boolean algebra - the AND operation
Bus
Bistable
Boolean multiplication
Capacitance
48. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Baseline
Ampere
Controller
Balanced Bridge
49. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Bode Plot
Concurrency
Cache memory
Boundary scan
50. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Kirchoff's Voltage Law
Data Sheet
Data bus
Design flow