SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. In a division operation the quantity that is being divided
Dividend
Balanced Load
Bus
Current sinking
2. A resettable protective device used for interrupting execessive current in an electric circuit
Circuit Breaker
Branch
DMA
Autotransformer
3. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
CMOS Complementary Metal Oxide Semiconductor
Assembler
Circuit
Kirchoff's Current Law(KCL)
4. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Circuit
Cache memory
Norton's Theorem
Base
5. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
6. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Concurrency
Carry
Bode Plot
Astable
7. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Counter
Boolean addition
Boolean multiplication
Average value
8. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Cross - assembler
Data bus
Decoder
Assembler
9. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Combinational logic
Kirchoff's Current Law(KCL)
Decade Counter
Bus contention
10. The ratio of pulse width to period expressed as a percentage
Boolean addition
Cascade
Circuit
Duty cycle
11. Data Terminal equipment
DTE
Array
Demultiplexer
Bleeder Current
12. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Delta Modulation
Capacity
Don't Care...
Analog- to- digital converter(ADC)
13. Information in numeric - alphabetic - or other form.
Central processing unit
Digital linear tape
Data
Charge- coupled device
14. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Architecture
Bit time
Duty cycle
Bipolar
15. Digital Signal Processor; a special type of microprocessor that processes data in real time
Amplitude
Analog- to- digital (A/D) conversion
DSP
Circular Mil (CM)
16. The current left after the total load current is subtracted from the total current into the circuit
Control Bus
Band- pass filter
Combinational logic
Bleeder Current
17. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Ampere- hour(Ah) rating
Adder
Dynamic Memory
Carry propagation
18. The ability of a capacitor to store electrical charge.
Capacitance
Access time
Architecture
Capacity
19. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Average value
ASCII
Comparator
Commutative Law
20. American National Standards Institute
Control Bus
ANSI
Charge
Binary coded decimal
21. In addition (Oring) and multiplication (ANDing) of three or more variables - the order in which the variables are grouped makes no difference
Associative law
DTE
Ampere
Collector
22. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Carry propagation
Base
Assembler
Capacity
23. To decrease the binary state of a counter by one
Decrement
Complement
Vx=(Vs * Rx) /RT
Acceptor
24. A method of analog- to- digital conversion using a 1- bit quantization process
Kirchoff's Voltage Law
Distributive Law
Delta Modulation
TTL
25. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Clear
Data
Analog- to- digital converter(ADC)
Duty cycle
26. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Bandwidth
Autotransformer
Base
Bus interface unit
27. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
CPLD
Dynamic Memory
Demultiplexer
Bistable
28. A programming language that uses English like words and has a one- to- one correspondence to machine language
Assembly language
Code
ABEL(Advance Boolean Expression Language)
Analog- to- digital converter(ADC)
29. The basic timing signal in a digital system; a periodic waveform in which the interval between pulses equals the time for one bit; the triggering input of a flip- flop
DSP
Clock
TTL
Ampere- hour(Ah) rating
30. Describes a number system with a base of ten
Decimal
Bus interface unit
Atom
Controller
31. A condition where all the load currents are equal and the neutral current is zero
Ampere- hour(Ah) rating
Cascade
Balanced Load
Norton's Theorem
32. The graph of a filter's frequency response showing the change in the output voltage to input voltage ratio expressed in dB as a function of frequency for a constant input voltage
Bode Plot
Center Tap
bed- of- nails
Capacitance Reactance
33. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Autotransformer
Norton's Theorem
Baseline
Commutative Law
34. In addition - the number to which the addend is added
Decoder
DRAM
Augend
Access time
35. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
AND array
DSP
ALU
Digital linear tape
36. The smallest particle of an element possessing the unique characteristics of that element.
Demultiplexer
Assembly language
Atom
Attenuation
37. A stage of the DSP pipeline operation in which instructions are assigned to functional units and are decoded.
Balanced Bridge
DCE
Decode
Charge- coupled device
38. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Boolean expression
Bandwidth
BEDO DRAM
CMOS Complementary Metal Oxide Semiconductor
39. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Digital linear tape
Charge
DMA
Bus
40. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Demultiplexer
Analog
Acceptor
CLB (Configurable Logic Block)
41. A type of magnetic tape format
Bistable
Compiler
Combinational logic
Digital linear tape
42. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Atomic number
Dynamic Memory
Astable
Binary
43. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
AND
AND gate
Bipolar
Admittance
44. An energy source that uses a chemical reaction to convert chemical energy into electrical energy.
Control Unit
Battery
AHDL
Dual in - line package
45. A logic gate that produces a High output only when all of the inputs are HIGH
Acceptor
AND gate
Architecture
Kirchoff's Current Law(KCL)
46. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Ammeter
Bit
AND
D Flip-Flop
47. The unit of electrical current
Ampere
Decrement
Clock
Collector
48. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Apparent power
D Flip-Flop
Architecture
BEDO DRAM
49. A code within DOS that allows various operations on files and includes a primitive assembler; to eliminate a problem in hardware or software.
Debug
Current sinking
Data Selector
Ampere- hour(Ah) rating
50. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
BEDO DRAM
Closed circuit
Address Bus
Associative law