SUBJECTS
|
BROWSE
|
CAREER CENTER
|
POPULAR
|
JOIN
|
LOGIN
Business Skills
|
Soft Skills
|
Basic Literacy
|
Certifications
About
|
Help
|
Privacy
|
Terms
|
Email
Search
Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A condition where all the load currents are equal and the neutral current is zero
Binary
Balanced Load
ASCII
AWG
2. A type of magnetic tape format
Access time
BIOS
Astable
Digital linear tape
3. The average of a sine wave over one half- cycle. It is 0.637 times the peak value.
Clear
Amplitude
Average value
Alphanumeric
4. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Control Unit
Bus interface unit
Charge- coupled device
Dividend
5. The process of rippling an input carry to become the output carry in a full- adder when either or both of the input bits are 1's and the input carry is a 1
Band- stop filter
Battery
Counter
Carry propagation
6. Bipolar junction transistor; a semiconductor device used for switching or amplification. A BJT has two junctions - the base- emitter junction and the base- collector junction
BJT
AHDL
Assembly language
Decode
7. Altera HDL; a nonstandard HDL
Current sinking
DTE
Compiler
AHDL
8. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Ampere
Dependency notation
Control Bus
Carry
9. A type of inductor used to block or choke off high frequencies
Atom
Circuit
AND gate
Choke
10. A binary digit - which can be either 1 or 0
AHDL
Bit
Architecture
Distributive Law
11. The unit of electrical current
Control Unit
Ampere
Alphanumeric
Bit time
12. An expression of variables and operators used to express the operation of a logic circuit
Boolean expression
Bleeder Current
Bus interface unit
BIOS
13. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Control Unit
DMA
Dynamic Memory
Data
14. A document that specifies parameter values and operating conditions for an integrated circuits or other device
DIMM
Data Sheet
Choke
Branch
15. A one- way group of conductors from the to a memory - or other external device - on which the address code is sent
Current sinking
Address Bus
Autotransformer
ALU
16. A programming language that uses English like words and has a one- to- one correspondence to machine language
Band- pass filter
Assembly language
ALU
Bistable
17. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Ampere- hour(Ah) rating
Attenuation
Thevenin Equivalent Circuit
BIOS
18. In a division operation the quantity that is being divided
AND gate
Dividend
Bitstream
Center Tap
19. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Thevenin Equivalent Circuit
Capacitor
Cascade
Bit time
20. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
BIOS
CPLD
Band- pass filter
Angular Velocity
21. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
Warning
: Invalid argument supplied for foreach() in
/var/www/html/basicversity.com/show_quiz.php
on line
183
22. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Capacity
Clear
Comparator
Dependency notation
23. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
Decoder
Ampere- hour(Ah) rating
Capacitance Reactance
24. The inverse of opposite of a number - in Boolean algebra - the inverse function - expressed with a bar over the variable. The complement of a 1 is a 0 - and vice versa
DMA
Complement
Angular Velocity
Decoder
25. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Astable
Clear
Band- pass filter
Balanced Bridge
26. Data Communications equipment
Balanced Bridge
Kirchoff's Current Law(KCL)
CMOS Complementary Metal Oxide Semiconductor
DCE
27. American National Standards Institute
Kirchoff's Voltage Law
Alphanumeric
ANSI
Controller
28. The ratio of pulse width to period expressed as a percentage
Duty cycle
Asynchronous counter
Control Unit
Bus contention
29. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Architecture
Distributive Law
Band- stop filter
Amplitude
30. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Don't Care...
Distributive Law
Decade
AND array
31. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
DMA
Carry propagation
Boolean addition
CMOS
32. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
CPLD
Analog- to- digital converter(ADC)
Ampere- hour(Ah) rating
AND
33. Characterized by ten states or values
Demultiplexer
Baseline
Branch
Decade
34. A type of counter in which each stage is clocked from the output of the preceding stage.
Dynamic Memory
Balanced Load
Asynchronous counter
Bipolar
35. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Array
Kirchoff's Current Law(KCL)
Apparent power
Demultiplexer
36. The process that prevents two sources from using a bus at the same time
Average value
Bitstream
Dependency notation
Bus arbitration
37. A logic gate that produces a High output only when all of the inputs are HIGH
ANSI
Bidirectional shift Register
AND gate
Decoder
38. Burst extended data output dynamic random- access memory
BEDO DRAM
ASCII
Balanced Load
DMA
39. A logic circuit used to add two binary numbers
DRAM
ABEL(Advance Boolean Expression Language)
Adder
Attenuation
40. A digital circuit capable of counting electronic events - such as pulses - by progressing through a sequence of binary states.
Vx=(Vs * Rx) /RT
Bipolar
Counter
bed- of- nails
41. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Charge
Architecture
Comparator
Bus interface unit
42. A combination of logic gates interconnected to produce a specified Boolean function with no storage or memory capability; sometimes called combinatorial logic
Combinational logic
Bus interface unit
Complement
Binary
43. Describes a number system with a base of ten
ABEL(Advance Boolean Expression Language)
Decimal
Center Tap
Distributive Law
44. A relatively small - high- speed memory that stores the most recently used instructions or data from the larger but slower main memory
Band- stop filter
CLB (Configurable Logic Block)
Dual in - line package
Cache memory
45. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
Address Bus
CLB (Configurable Logic Block)
Capacitor
DTE
46. The current left after the total load current is subtracted from the total current into the circuit
Analog
Bleeder Current
Delta Modulation
Analog- to- digital converter(ADC)
47. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Data Sheet
Collector
Boolean algebra
Binary
48. The mathematics of logic circuits
Bleeder Current
Boolean algebra
Capacitance
Angular Velocity
49. In relation to VHDL feature that permits operations to be processed in a parallel;that is operations that occur simultaneously
Concurrency
Kirchoff's Voltage Law
Atomic number
AWG
50. One current path in a parallel circuit; a current path that connects two nodes
Decade
Branch
CPLD
Asynchronous counter