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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. A device used to convert an analog signal to a sequence of digital codes
Decrement
Analog- to- digital converter(ADC)
Clear
Central processing unit
2. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Clear
Ampere- hour(Ah) rating
Decrement
Dividend
3. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Attenuation
Decade Counter
Associative law
CLB (Configurable Logic Block)
4. Consisting of numerals - letters - and other characters
Charge- coupled device
Alphanumeric
Dynamic Memory
Vx=(Vs * Rx) /RT
5. A logic circuit used to add two binary numbers
Concurrency
Code
Adder
Architecture
6. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
ABEL(Advance Boolean Expression Language)
Dependency notation
Bit time
Antifuse
7. One current path in a parallel circuit; a current path that connects two nodes
Amplitude
Average value
Decimal
Branch
8. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Boolean addition
Control Unit
Ampere
Data Sheet
9. The smallest particle of an element possessing the unique characteristics of that element.
Balanced Load
Access time
Atom
Controller
10. Transistor-Transistor Logic and is implemented with bipolar junction transistors
Band- stop filter
TTL
Access time
Comparator
11. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Acceptor
Distributive Law
DSP
Demultiplexer
12. One of the three regions in a bipolar junction transistor
Base
BIOS
Choke
Kirchoff's Voltage Law
13. The total number of data units(bits - nibbles - bytes - words) that a memory can store.
Vx=(Vs * Rx) /RT
Capacity
Analog
Bidirectional shift Register
14. The digit generated when the sum of two binary digits exceeds 1
Boolean multiplication
Carry
Bleeder Current
Address Bus
15. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Thevenin Equivalent Circuit
Bus interface unit
Aliasing
Decade Counter
16. The process that prevents two sources from using a bus at the same time
Decode
Bus arbitration
Bus interface unit
Analog- to- digital (A/D) conversion
17. Describes a number system with a base of ten
Decrement
Decade Counter
Decimal
Antifuse
18. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Base address
DRAM
Charge- coupled device
Bipolar
19. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Data bus
Charge- coupled device
Decoder
Augend
20. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Code
Balanced Bridge
ANSI
Amplitude
21. A type of inductor used to block or choke off high frequencies
Apparent power
Antifuse
Choke
Capacitance
22. An array of AND gates consisting of a matrix of programmable interconnection
AND array
DRAM
Analog
Diode
23. Having two directions. the stored data can be shifted right or left
Carry
DRAM
Bidirectional shift Register
Augend
24. An expression of variables and operators used to express the operation of a logic circuit
Boolean expression
Decode
Access time
Control Bus
25. Sum of all the voltage drops in series equals to the source voltage
Warning
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183
26. A digital counter having ten states
Decade Counter
BJT
Compiler
DRAM
27. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Aliasing
Acceptor
CPLD
Charge
28. Having no stable state. An astable multivibrator oscillates between two quasi- stable states.
Collector
Apparent power
Carry propagation
Astable
29. A notational system for logic symbols that specifies input and output relationships thus fully defining a given function
Diode
Counter
Astable
Dependency notation
30. Information in numeric - alphabetic - or other form.
CPLD
Data
Branch
Bus
31. The process of producing an output carry in full- adder when both input bits are 1s.
Compiler
Bitstream
CLB (Configurable Logic Block)
Carry generation
32. The location of a given storage cell or group of cells in a memory; a unique memory location containing on byte
Decrement
Address
Choke
Central processing unit
33. Direct memory access; a method to directly interface a peripheral device to memory without using the CPU for control
Astable
Counter
AND array
DMA
34. A filter that passes a range of frequencies lying between two critical freqencies and rejects frequencies above and below that range.
Adjacency
Band- pass filter
Debug
Bus arbitration
35. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Adjacency
Antifuse
Architecture
Cache memory
36. The process of converting an analog signal to digital form
Analog- to- digital (A/D) conversion
Bit time
Circular Mil (CM)
Apparent power
37. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
AHDL
Augend
Address Bus
Bit time
38. A type of counter in which each stage is clocked from the output of the preceding stage.
Asynchronous counter
Bus contention
Decade Counter
Comparator
39. A program that converts English- like mnemonics into machine code
Vx=(Vs * Rx) /RT
Assembler
Data bus
DAT
40. The normal level of a pulse waveform; the voltage level in the absence of a pulse.
Kirchoff's Current Law(KCL)
Baseline
Capacitance Reactance
Current sinking
41. Characterized by ten states or values
Byte
Analog- to- digital (A/D) conversion
Antifuse
Decade
42. In a division operation the quantity that is being divided
Comparator
Decade
Boolean addition
Dividend
43. In Boolean algebra - the AND operation
Bus contention
Bitstream
Control Bus
Boolean multiplication
44. The range of frequencies for which the current (or output voltage) is equal to or greater than 70.7% of its value at the resonant frequency that is considered to be passed by a filter.
Bipolar
Kirchoff's Voltage Law
Bandwidth
Associative law
45. Basic input/output system; a set of programs in ROM that interfaces the I/) devices in a computer system
Admittance
BIOS
Address Bus
Boundary scan
46. A unit of the cross - sectional area of a wire.
Associative law
Digital linear tape
DCE
Circular Mil (CM)
47. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Capacity
Controller
Decrement
DMA
48. A receiving device on a bus
Acceptor
CPLD
Boolean multiplication
Code
49. A electrical property of matter that exist because of an excess or a deficiency of electrons. Can be either positive or negative
Charge
Dependency notation
Amplitude
Byte
50. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Capacitor
Dividend
TTL
Component