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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. An application program in development software packages that controls the design flow process and translates source code into object code in a format that can be logically tested or downloaded to a target device
BJT
Compiler
Base
CMOS
2. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
DIMM
Architecture
Boolean addition
ALU
3. The smallest particle of an element possessing the unique characteristics of that element.
Data
Controller
Atom
Associative law
4. A VHDL feature that can be used to predefine the logic function for multiple use throughout a program or programs
Component
Address
Data bus
Data Selector
5. In Boolean algebra - the OR operation
Complement
Angular Velocity
Buffer
Boolean addition
6. A basic logic operation in which a true(high) output occurs only when all the input conditions are true (high)
Base address
Ampere- hour(Ah) rating
Branch
AND
7. A complex programmable logic device that consists basically of muliple SPLD arrays with programmable interconnections.
Closed circuit
Norton's Theorem
CPLD
D Flip-Flop
8. A type of magnetic tape format
Digital linear tape
ABEL(Advance Boolean Expression Language)
Delta Modulation
AHDL
9. The law that states ORing several variables and then ANDing the single variable with each of the several variables and the ORing the product
Address Bus
Data bus
Attenuation
Distributive Law
10. A method for internally testing a PLD based on the JTAG standard (IEEE std.)
Capacitance
Decrement
Boundary scan
Bus arbitration
11. A condition where all the load currents are equal and the neutral current is zero
Code
AND gate
DMA
Balanced Load
12. A unit of logic in an FPGA that is made up of multiple smaller logic modules and a local programmable interconnect that is used to connect logic modules within the CLB
CLB (Configurable Logic Block)
Adjacency
Current sinking
Cache memory
13. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Combinational logic
BEDO DRAM
Data bus
Controller
14. Having two stable states. Flip- flops and latches are bistable multivibrators.
Bode Plot
Bistable
Demultiplexer
Acceptor
15. In addition - the number that is added to another number called the augend
Compiler
Admittance
Addend
Norton's Theorem
16. A programming language that uses English like words and has a one- to- one correspondence to machine language
Bleeder Current
Assembly language
Center Tap
Branch Current
17. A circuit that prevents loading of an input or output
Digital linear tape
Cache memory
Buffer
Dependency notation
18. An electrical device consisting of two conductive plates separated by an insulating material and possessing the property of capacitance.
Bode Plot
Capacitor
Vx=(Vs * Rx) /RT
AND
19. The beginning address of a segment of memory
Dynamic Memory
D Flip-Flop
BJT
Base address
20. A digital circuit device that converts coded information into another (familiar) or noncoded form
Bus arbitration
Data Sheet
Decoder
Design flow
21. Dynamic random- access memory; a type of semiconductor memory that uses capacitors as the storage elements and is a volatile - read/write memory
Boundary scan
DRAM
Diode
BEDO DRAM
22. A digital code in which each of the decimal digits - 0 through 9 - is represented by a group of four bits
Alphanumeric
Addend
Binary coded decimal
Distributive Law
23. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Aliasing
Cache memory
Base
bed- of- nails
24. One of the three regions in a bipolar junction transistor
Astable
Base
Carry
D Flip-Flop
25. A bidirectional set of conductive paths on which data or instruction codes are transferred into a microprocessor or on which the result of an operation is sent out from the microprocessor
Data bus
Circuit
Adjacency
Commutative Law
26. Sum of all the voltage drops in series equals to the source voltage
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27. Data Communications equipment
Kirchoff's Voltage Law
Decrement
DCE
Band- stop filter
28. The phasor combination of resistive power (true power) and reactive power. The unit is the volt- amperes (VA).
ANSI
Apparent power
Angular Velocity
DRAM
29. The mathematics of logic circuits
Amplitude
Boolean algebra
Balanced Load
Concurrency
30. A connection at the midpoint of a winding in a transformer
Bus
Clock
Buffer
Center Tap
31. An array of AND gates consisting of a matrix of programmable interconnection
Ammeter
AND array
BJT
Ampere- hour(Ah) rating
32. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Boolean multiplication
Thevenin Equivalent Circuit
Ampere- hour(Ah) rating
Clock
33. The process of converting an analog signal to digital form
Don't Care...
Analog- to- digital (A/D) conversion
DRAM
Boolean multiplication
34. The portion of the CPU that interfaces with the system buses and fetches instructions - reads operands - and writes results.
Bistable
Admittance
Bus interface unit
Base
35. A program that translates an assembly language program for one type of microprocessor to an assembly language for another type of microprocessor
Branch
Cross - assembler
AND gate
Adder
36. A type of bistable multivibrator in which the output assumes the state of the D input on the triggering edge of a clock pulse.
Bode Plot
D Flip-Flop
Dynamic Memory
AND gate
37. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Clock
Analog- to- digital converter(ADC)
Bit time
Alphanumeric
38. An asynchronous input used to reset a flip- flop (make the Q output 0); to place a register or counter in the state in which it contains all 0's
Bipolar
Clear
Kirchoff's Current Law(KCL)
Binary
39. A number given in ampere- hours determined by multiplying the current times the length of the time (h) a battery can deliver that current to a load
Boolean algebra
Ampere- hour(Ah) rating
BJT
Addend
40. A binary digit - which can be either 1 or 0
Bit
Diode
Carry propagation
Clear
41. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
AWG
Branch
Array
Ampere- hour(Ah) rating
42. The action of a circuit in which it accepts current into its output from a load
Capacitor
Current sinking
Bias
Circuit
43. A class of integrated logic circuits that is implemented with a type of field effect transistor
DIMM
Dual in - line package
CMOS Complementary Metal Oxide Semiconductor
Address
44. The main part of a computer responsible for control and processing of data; the core of a DSP that processes the program instructions
Design flow
AWG
Circuit
Central processing unit
45. A type of PLD nonvolatile programmable link that can be left open or can be shorted once as directed by the program
Antifuse
Buffer
Vx=(Vs * Rx) /RT
Center Tap
46. American Standard Code for Information Interchange; the most widely used alphanumeric code.
Debug
ASCII
Array
Component
47. Consisting of numerals - letters - and other characters
Control Unit
Alphanumeric
Dividend
bed- of- nails
48. A digital counter having ten states
Attenuation
Decade Counter
Clear
Asynchronous counter
49. Data Terminal equipment
DTE
Binary
Central processing unit
Controller
50. The actual current in a branch
Branch Current
Boolean addition
Component
CPLD