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Test your basic knowledge |
Digital Fundamentals
Start Test
Study First
Subject
:
engineering
Instructions:
Answer 50 questions in 15 minutes.
If you are not ready to take this test, you can
study here
.
Match each statement with the correct term.
Don't refresh. All questions and answers are randomly picked and ordered every time you load a test.
This is a study tool. The 3 wrong answers for each question are randomly chosen from answers to other questions. So, you might find at times the answers obvious, but you will see it re-enforces your understanding as you take the test each time.
1. Altera HDL; a nonstandard HDL
Commutative Law
Battery
Vx=(Vs * Rx) /RT
AHDL
2. In a pulse waveform - the height or maximum value of the pulse as measured from its low level.
Augend
Amplitude
Branch
DMA
3. A bridge circuit that is in the balanced state as indicated by 0 V across the output.
Digital linear tape
DCE
Balanced Bridge
Compiler
4. A circuit (digital service) that switches digital data from one input line to several output lines in a specified time sequence
Clear
Capacitance Reactance
Demultiplexer
Admittance
5. An arrangement of electrical and/or electronic components interconnected in such a way as to perform a specified function
Base
Circuit
Average value
Component
6. Stands for Complementary Metal-Oxide Semiconductor and is implemented with a type of field transistor
CMOS
Average value
Dependency notation
Data bus
7. A set of conductive paths hat connects the CPU to other parts of the computer to coordinate its operations and to communicate with external devices
Control Bus
Bit
Central processing unit
Alphanumeric
8. Having two values or states; describes a number system that has a base of two and utilizes 1 and 0 as its digits
Boundary scan
Decade
Binary
Decode
9. A reduction of the output signal compared to the input signal - resulting in a ratio with a value of less than 1 for the output voltage to the input voltage of a circuit.
Code
Acceptor
Decimal
Attenuation
10. The mathematics of logic circuits
Cache memory
Angular Velocity
Decode
Boolean algebra
11. A digital circuit device that converts coded information into another (familiar) or noncoded form
Decoder
Delta Modulation
Closed circuit
Circuit
12. A type of IC package whose leads must pass through holes to the other side of a PC board
Base address
Augend
Dual in - line package
Charge- coupled device
13. One of the three regions in a bipolar junction transistor
DTE
Base
Thevenin Equivalent Circuit
Delta Modulation
14. Arithmetic Logic Unit; the key processing element of a microprocessor that perfoms arithmetic and logic operations.
DIMM
AND
Control Unit
ALU
15. A type of semiconductor memory that stores data in the form of charge packets and is serially accessed
Controller
Central processing unit
Balanced Bridge
Charge- coupled device
16. A circuit with a complete current path
Comparator
Bus contention
Admittance
Closed circuit
17. The opposition of a capacitor to permit current; the reciprocal of capacitive reactance. The unit is the siemens.
Capacitance Reactance
Baseline
Capacitance
Bus contention
18. To decrease the binary state of a counter by one
Adjacency
Analog
Capacity
Decrement
19. A software compiler language for SPLD programming; a type of hardware description language (HDL)
Component
ABEL(Advance Boolean Expression Language)
Bistable
Base
20. A document that specifies parameter values and operating conditions for an integrated circuits or other device
Concurrency
Data Sheet
Cascade
AND
21. Information in numeric - alphabetic - or other form.
Dividend
Data
Compiler
Binary
22. A type of semiconductor memory having capacitive storage cells that lose stored data over a period of time and therefore must be refreshed.
Boolean addition
Dynamic Memory
Bias
Center Tap
23. One of the three regions in a bipolar Junction transistor(North junction of NpN)
Collector
Astable
Current sinking
Closed circuit
24. Having two directions. the stored data can be shifted right or left
Charge
Bit
Bidirectional shift Register
Adjacency
25. Data Communications equipment
CPLD
Atomic number
Astable
DCE
26. To connect 'end- to- end' as when several counters are connected from the terminal count output of one counter to the enable input of the next counter
Admittance
Cascade
ASCII
CPLD
27. The VHDL unit that describes the internal operation of a logic function; the internal functional arrangement of the elements that give a device its particular operating characteristics.
Balanced Load
Dependency notation
Buffer
Architecture
28. The process or sequence of operations carried out to program a target device
Design flow
Current sinking
Decode
TTL
29. Consisting of numerals - letters - and other characters
Average value
Alphanumeric
Counter
AND gate
30. In addition - the number to which the addend is added
Address
Augend
CPLD
Binary
31. A type of inductor used to block or choke off high frequencies
DSP
Choke
DMA
Digital linear tape
32. The action of a circuit in which it accepts current into its output from a load
Current sinking
CPLD
Kirchoff's Current Law(KCL)
Ammeter
33. A group of eight bits
Demultiplexer
Byte
Architecture
Base
34. A two terminal circuit containing voltage sources - current sources - and resistors can be modeled as a voltage source in series with a resistor
Baseline
Counter
Thevenin Equivalent Circuit
DCE
35. A combination of input literals that cannot occur and can be used as a 1 or 0 on a Karnaugh Map for simplification
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36. In a PLD - a matrix formed by rows of product- term lines columns of input lines with a programmable cell at each junctions. In VHDL - an array is an ordered set of individual items called elements with a single identifier name.
Collector
Balanced Bridge
Array
Commutative Law
37. A method for the automated testing of printed circuit boards in which the board is mounted on a fixture that resembles a bed of nails that makes contact with test points
Delta Modulation
CMOS
bed- of- nails
Distributive Law
38. The effect created when a signal is sampled at less than twice the signal frequency. Aliasing creates unwanted frequencies that interfere with the signal frequency.
Capacitance
Aliasing
Branch Current
Charge- coupled device
39. The unit of electrical current
Assembly language
Carry propagation
Ampere
Decade
40. Describes a number system with a base of ten
ASCII
Cross - assembler
Decimal
Bus contention
41. A type of counter in which each stage is clocked from the output of the preceding stage.
Boolean multiplication
Antifuse
ALU
Asynchronous counter
42. The interval of time occupied by a single bit in a sequence of bits; the period of the clock
Design flow
Demultiplexer
Bit time
Distributive Law
43. The process that prevents two sources from using a bus at the same time
Bus arbitration
Aliasing
Commutative Law
CPLD
44. The rotational rate of a phasor which is related to the frequency of the sine wave that the phasor represents
Bidirectional shift Register
Choke
Angular Velocity
DSP
45. A circuit that prevents loading of an input or output
Decade
Buffer
Bandwidth
Dividend
46. A method of analog- to- digital conversion using a 1- bit quantization process
ALU
Carry generation
Closed circuit
Delta Modulation
47. An instrument that can specify each of the other instruments on the bus as either a talker or a listener for the purpose of data transfer.
Capacitance
Apparent power
Controller
Delta Modulation
48. A theorem that states that any amount of voltage sources and current sources can be combined into a single current source with a parallel resistor.
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49. Digital audio tape; a type of magnetic tape format
Don't Care...
DAT
Distributive Law
D Flip-Flop
50. The portion within the microprocessor that provides the timing and control signals for getting data into and out of the microprocessor and for synchronizing the execution of instructions.
Central processing unit
Boundary scan
Control Unit
Bitstream